/riscv_emu

A Simple RISC-V Emulator in Rust

Primary LanguageRust

A Simple RISC-V Emulator in Rust

A simple CPU with the aim of learning the RISC-V ISA, Computer Architecture(Memory, I/O, Interrupts), and Rust by the way.

Till now

  • A simple CPU that can execute add and addi instructions. The add instruction adds 64-bit values in two registers, and the addi instruction adds a 64-bit value in a register and a 12-bit immediate value.

TODO

  • Extend to more instructions