Specy opened this issue 3 years ago · 1 comments
When using post increment/pre decrement operands, if the destination register is both read and written to, the increment/decrement will be executed twice, ex: add.l d0, (a0)+ will increment a0 by 4 twice, so the result will be 8 instead of 4
add.l d0, (a0)+
Fixed in 4800e89