SweetWeeds

Somewhere between HW and SW

KAIST Semiconductor System Lab

Pinned Repositories

2020---Imitating-Arm
Language:Assembly0 0 00
2020-IA
Language:Assembly0 1 00
2020_S-HERO_WPC
Language:C00
DL_Seminar_Task1
VGG8 without DNN Framework
Language:Jupyter Notebook00
DL_Seminar_Task2
Language:C++0 1 00
DS_HW-1
Language:C++00
EmbeddedSystem-HW1
Language:Cuda00
EmbeddedSystem-HW2
Language:Cuda00
hdl
HDL libraries and projects
Language:Verilog00
oh
Verilog library for ASIC and FPGA designers
Language:Verilog1 0 00

SweetWeeds's Repositories

SweetWeeds/oh
Verilog library for ASIC and FPGA designers
Language:Verilog1 0 00
SweetWeeds/2020---Imitating-Arm
Language:Assembly0 0 00
SweetWeeds/2020-IA
Language:Assembly0 1 00
SweetWeeds/2020_S-HERO_WPC
Language:C00
SweetWeeds/DL_Seminar_Task1
VGG8 without DNN Framework
Language:Jupyter Notebook00
SweetWeeds/DL_Seminar_Task2
Language:C++0 1 00
SweetWeeds/DS_HW-1
Language:C++00
SweetWeeds/EmbeddedSystem-HW1
Language:Cuda00
SweetWeeds/EmbeddedSystem-HW2
Language:Cuda00
SweetWeeds/hdl
HDL libraries and projects
Language:Verilog00
SweetWeeds/ICE3037_Project
Language:Python1
SweetWeeds/Microprocessor_Final_TermProject
Language:C
SweetWeeds/Microprocessor_Middle_TermProject
Language:C
SweetWeeds/PipeCNN
An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
SweetWeeds/RSTT
Official pytorch implementation of paper "RSTT: Real-time Spatial Temporal Transformer for Space-Time Video Super-Resolution"
SweetWeeds/shh2021_LiveinSIOR
Language:C1
SweetWeeds/Simple_TPU
Language:Jupyter Notebook1 01
SweetWeeds/SIOR-Tangible-Media-Group
Language:Python1 0
SweetWeeds/SIOR-TITAN
Language:Makefile
SweetWeeds/SweetWeeds
1 01
SweetWeeds/SweetWeeds-2020_Seoul_Hardware_Hackathon_SIOR
Language:HTML1 0
SweetWeeds/torch-ngp
A pytorch CUDA extension implementation of instant-ngp (sdf and nerf), with a GUI.
Language:Python0 0
SweetWeeds/vortex
Language:Verilog0 0