This IP supports Q-Number multiplication.
Implemented simple neural-network (3 FC-Layer, without bias & batchnorm) for classification of MNIST Hand-written dataset
Board: Xilinx UltraScale+ ZCU102
Tool: Xilinx Vivado 2020.2
GUI_SW: Graphic Interface for PC-FPGA with UART
mnist_handwritten: Classification model for mnist handwritten dataset
sim_1: Simulation of RTL
sources_1: RTL source codes
vitis project: Firmware for PC-FPGA with UART