Issues
- 0
523
#39 opened by Akabmultani - 0
Getting the warning "UNOPTFLAT" while simulating openc910 with Verilator.
#38 opened by vinuthavelaga - 1
二维码对应的群已达上限,无法加入
#30 opened by chasinglulu - 2
- 1
address map
#16 opened by alexking17 - 1
jtag can not connect
#35 opened by Jeremy-Jia - 0
simulation finished with error
#34 opened by 1348876452 - 0
vcs emulation error in ubuntu system
#33 opened by huaiwangyu - 0
How to generate tarmac file for xuantie 908/910
#31 opened by JFHeee - 3
Documentation for XuanTie Instruction Extension
#17 opened by tirumalnaidu - 2
Toolchain Sources
#19 opened by palmer-dabbelt - 0
discussion group is full
#29 opened by predator2k - 0
Fix the Makefile in smart_run
#28 opened by Warlockch - 0
NOT ABLE TO SYNTHESIZE IN OPENLANE
#26 opened by Singleboardcomputer - 2
does openc910 support multi-core
#20 opened by QiaowenYoung - 1
Getting Started
#24 opened by supratim-k - 1
掃描討論群無法加入
#21 opened by nicolast0604 - 2
ERROR while making runcase
#25 opened by liuyuxivapor - 0
/bin/sh: 1: Syntax error: Unterminated quoted string Makefile:249: recipe for target 'help' failed
#22 opened by nicolast0604 - 0
- 12
Clarification
#9 opened by taylor-bsg - 2
Non-standard RISC-V Extension
#14 opened by avianes - 0
example setup comment
#4 opened by yanjun3x - 7
The xuantie910 published in ISCA20
#1 opened by zhaoxiahust - 6
- 0
- 1
Some code is not standard-compliant Verilog
#2 opened by Icenowy