Pinned Repositories
32-Verilog-Mini-Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM
AMBA_AXI_AHB_APB
AMBA bus lecture material
ariane
Ariane is a 6-stage RISC-V CPU capable of booting Linux
basic_verilog
Must-have verilog systemverilog modules
bin2coe
Binary data to Xilinx COE BRAM Converter
busybear-linux
busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.
Cache-Replacement-Algorithm-Simulator
Simulator similar to Champ sim which gives then hit ratio of a given algorithm with respect to a trace file
CampusShame
互联网仍有记忆！那些曾经在校招过程中毁过口头offer、意向书、三方的公司！纵然人微言轻，也想尽绵薄之力！
NF5
A simple 5-stage Pipeline RISC-V core
RV32I-GPU
RV32I Open Source GPU
Y-BoBo's Repositories
Y-BoBo/RV32I-GPU
RV32I Open Source GPU
Y-BoBo/32-Verilog-Mini-Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM
Y-BoBo/basic_verilog
Must-have verilog systemverilog modules
Y-BoBo/bin2coe
Binary data to Xilinx COE BRAM Converter
Y-BoBo/CampusShame
互联网仍有记忆！那些曾经在校招过程中毁过口头offer、意向书、三方的公司！纵然人微言轻，也想尽绵薄之力！
Y-BoBo/carrv.github.io
Workshop on Computer Architecture Research with RISC-V (CARRV)
Y-BoBo/clash_for_windows_pkg
A Windows/macOS GUI based on Clash
Y-BoBo/cores-verilog
Various HDL (Verilog) IP Cores
Y-BoBo/CuAssembler
An unofficial cuda assembler, for all generations of SASS, hopefully ：）
Y-BoBo/CuPBoP
A framework that support executing unmodified CUDA source code on non-NVIDIA devices.
Y-BoBo/DeepLearningSystem
Deep Learning System core principles introduction.
Y-BoBo/gpgpu-sim_distribution
GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as well as a performance visualization tool, AerialVisoin, and an integrated energy model, GPUWattch.
Y-BoBo/llvm
Y-BoBo/nudtpaper-yb_unused_2022
A LaTeX template for Master/PhD Thesis of NUDT
Y-BoBo/NVPTX-SPIRV-Translator
The translator that supports translating NVPTX to SPIR-V. This translator is modified from LLVM-SPIR-V Translator.
Y-BoBo/openc906
OpenXuantie - OpenC906 Core
Y-BoBo/openc910
OpenXuantie - OpenC910 Core
Y-BoBo/opene902
OpenXuantie - OpenE902 Core
Y-BoBo/opene906
OpenXuantie - OpenE906 Core
Y-BoBo/openpiton
The OpenPiton Platform
Y-BoBo/pdfs
Technically-oriented PDF Collection (Papers, Specs, Decks, Manuals, etc)
Y-BoBo/pocl
a clone of POCL that includes RISC-V newlib devices support and Vortex
Y-BoBo/pocl-initial
pocl - Portable Computing Language
Y-BoBo/ventus-gpgpu
GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
Y-BoBo/verilog-mode
Verilog-Mode for Emacs with Indentation, Hightlighting and AUTOs. Master repository for pushing to GNU, verilog.com and veripool.org.
Y-BoBo/vortex
Y-BoBo/vortex-toolchain-prebuilt
Y-BoBo/vortex_tutorials
Y-BoBo/warp-v
WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.
Y-BoBo/zheda_jiaocai_pdf
浙江大学课程攻略共享计划