ZipCPU

Gisselquist Technology, LLC

Pinned Repositories

autofpga
A utility for Composing FPGA designs from Peripherals
Language:C++157 18 418
dblclockfft
A configurable C++ generator of pipelined Verilog FFT cores
Language:C++209 14 1328
dspfilters
A collection of demonstration digital filters
Language:Verilog132 10 037
eth10g
10Gb Ethernet Switch
Language:C137 10 014
kimos
Enclustra Mercury demonstration project
Language:C6 3 00
sdspi
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
Language:Verilog155 9 626
vgasim
A Video display simulator
Language:Verilog152 15 616
wb2axip
Bus bridges and other odds and ends
Language:Verilog447 30 5296
wbuart32
A simple, basic, formally verified UART controller
Language:Verilog262 15 348
zipcpu
A small, light weight, RISC CPU soft core
Language:Verilog1.2k 61 28150

ZipCPU's Repositories

ZipCPU/zipcpu
A small, light weight, RISC CPU soft core
Language:Verilog1.2k 61 28150
ZipCPU/wb2axip
Bus bridges and other odds and ends
Language:Verilog447 30 5296
ZipCPU/wbuart32
A simple, basic, formally verified UART controller
Language:Verilog262 15 348
ZipCPU/dblclockfft
A configurable C++ generator of pipelined Verilog FFT cores
Language:C++209 14 1328
ZipCPU/autofpga
A utility for Composing FPGA designs from Peripherals
Language:C++157 18 418
ZipCPU/sdspi
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
Language:Verilog155 9 626
ZipCPU/vgasim
A Video display simulator
Language:Verilog152 15 616
ZipCPU/eth10g
10Gb Ethernet Switch
Language:C137 10 014
ZipCPU/dspfilters
A collection of demonstration digital filters
Language:Verilog132 10 037
ZipCPU/openarty
An Open Source configuration of the Arty platform
Language:Verilog117 14 324
ZipCPU/dpll
A collection of phase locked loop (PLL) related projects
Language:Verilog91 10 126
ZipCPU/cordic
A series of CORDIC related projects
Language:C++80 10 220
ZipCPU/qspiflash
A set of Wishbone Controlled SPI Flash Controllers
Language:Verilog71 11 224
ZipCPU/wbscope
A wishbone controlled scope for FPGA's
Language:Verilog71 9 16
ZipCPU/sdr
A basic Soft(Gate)ware Defined Radio architecture
Language:Verilog61 13 113
ZipCPU/interpolation
Digital Interpolation Techniques Applied to Digital Signal Processing
Language:Verilog48 5 112
ZipCPU/zbasic
A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
Language:Verilog42 4 106
ZipCPU/wbi2c
Wishbone controlled I2C controllers
Language:Verilog38 7 08
ZipCPU/fftdemo
A demonstration showing how several components can be compsed to build a simulated spectrogram
Language:Verilog37 4 09
ZipCPU/dbgbus
A collection of debugging busses developed and presented at zipcpu.com
Language:Verilog32 7 14
ZipCPU/rtcclock
A Real Time Clock core for FPGA's
Language:Verilog20 5 03
ZipCPU/wbfmtx
A wishbone controlled FM transmitter hack
Language:Verilog20 4 02
ZipCPU/wbpwmaudio
A wishbone controlled PWM (audio) controller
Language:Verilog15 2 04
ZipCPU/website
The ZipCPU blog
Language:HTML14 4 58
ZipCPU/wbspi
A collection of SPI related cores
Language:Verilog13 2 15
ZipCPU/qoiimg
Quite OK image compression Verilog implementation
Language:Verilog121
ZipCPU/axidmacheck
AXI DMA Check: A utility to measure DMA speeds in simulation
Language:Verilog9 4 37
ZipCPU/wbsata
Wishbone SATA Controller
Language:Verilog8 2 0
ZipCPU/kimos
Enclustra Mercury demonstration project
Language:C6 3 00
ZipCPU/FtcRobotController
FTC SDK 8.0 Power Play
Language:Java1 0