Geeks
ZipCPU
/
zipversa
A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure
Primary Language
Verilog
zipversa GitHub
Markdown
Readme
2
Issues
13
Stargazers
4
Watchers
Issues
Closed issue
Dual Strong Copyleft Licensing
#2 opened
a year ago
3
Open issue
Running sim&build with newer Verilator version
#1 opened
2 years ago
4