aaupov's Stars
llvm/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
sharkdp/hyperfine
A command-line benchmarking tool
hsutter/cppfront
A personal experimental C++ Syntax 2 -> Syntax 1 compiler
facebookarchive/BOLT
Binary Optimization and Layout Tool - A linux command-line utility used for optimizing performance of binaries
ispc/ispc
Intel® Implicit SPMD Program Compiler
eliben/pyelftools
Parsing ELF and DWARF in Python
plasma-umass/Mesh
A memory allocator that automatically reduces the memory footprint of C/C++ applications.
KastnerRG/riffa
The RIFFA development repository
rems-project/sail
Sail architecture definition language
google/llvm-propeller
PROPELLER: Profile Guided Optimizing Large Scale LLVM-based Relinker
zamazan4ik/awesome-pgo
Various materials about Profile Guided Optimization and other similar stuff like AutoFDO, Bolt, etc.
CTSRD-CHERI/cheribsd
FreeBSD adapted for CHERI-RISC-V and Arm Morello.
zhelnio/schoolRISCV
CPU microarchitecture, step by step
alllex/parsus
Parser-combinators with Multiplatform Kotlin Coroutines
aayasin/perf-tools
A collection of performance analysis tools, recipes, handy scripts, microbenchmarks & more
oxidecomputer/cobalt
A collection of common Bluespec interfaces/modules.
viktor-prutyanov/drec-fpga-intro
Материалы для курсов "Введение в проектирование на языке Verilog" (2024+), "Введение в FPGA и Verilog" (2018-2019)
lsds/intravisor
Virtualisation platform using CHERI for isolation and sharing
intel-ai/hdk
A low-level execution library for analytic data processing.
EXL/P2kElfs
Various ELF programs for Motorola P2K phones.
gitvipin/sql30
A zero weight ORM for sqlite3 in Python
DigitalDesignSchool/schoolRISCV
CPU microarchitecture, step by step
ChrisShakkour/RV32I-MAF-project
Designinig a Pipeline in-order 5 stage RISC-V core RV32I-MAF
sangwoojun/ulx3s_bsv
Bluespec environment for working with the ulx3s board and its lattice ecp5 fpga
igorsmir-ilab/public
A collection of my cources, lectures, articles and presentations
ImaginationZ/CGT-MD2013
MIPT-ILab/digital-design
Lectures on Digital Design
GaloisInc/BESSPIN-coremark
The BESSPIN fork of CoreMark®, an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).
aaronwubshet/6175labs
semanticduplicates/sdsw
Semantic Duplicates analyzer