agostini01/FPGA_Neural-Network
The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the Neural Network part is meant to be generic, thus it can be used along with different hardware setups.
VHDLGPL-3.0
Stargazers
- abyssxsy
- cgoxopxSichuan China
- CuteSC2Germany
- elegz
- helloqtpurr
- IanBoyanZhang
- jiangxiaogg
- jpgarlandTrinity College Dublin
- JSeam2Zkonduit
- judicaelclairHapteon
- leehongmingtsinghua
- LeonardoTartari
- lucas-lemeVinci Partners
- masterdezign
- MohammedRashadDevisionX
- mohkredi
- Nicolas-MariottiKNDS
- pkt
- Purepipha
- robtaylorManchester
- Sandy4321
- sh1neonBeijing, China
- Silicon1602San José, California
- sosnitzkij
- tcz001ThoughtWorks
- yassinechelly17
- zhangtemplar@google