ahmadsb101's Stars
Xilinx/RapidWright
Build Customized FPGA Implementations for Vivado
IUST-Computer-Organization/LUMOS
Light Utilization with Multicycle Operational Stages (LUMOS) RISC-V Processor
open-neuromorphic/expelliarmus
A Python package for decoding RAW and DAT files (Prophesee) to structured NumPy arrays of events.
open-neuromorphic/awesome-neuromorphic-hw
Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.
open-neuromorphic/open-neuromorphic
List of open source neuromorphic projects: SNN training frameworks, DVS handling routines and so on.
FPGADude/Digital-Design
Verilog HDL files
mlabonne/llm-course
Course to get into Large Language Models (LLMs) with roadmaps and Colab notebooks.
GoogleCloudPlatform/generative-ai
Sample code and notebooks for Generative AI on Google Cloud, with Gemini on Vertex AI
linghaosong/Sextans
An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
OpenMP/Examples
LaTeX Examples Document Source
rapidstream-org/rapidstream-tapa
RapidStream-TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.
cdsc-github/parade-ara-simulator
PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration
SFU-HiAccel/SyncNN
[FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.
frwang96/verik
Verik toolchain
michaeljclark/rv8
RISC-V simulator for x86-64
VArchC/ArchC
A powerful and modern open-source architecture description language.
caesr-uwaterloo/gem5-rt-cachecoherence
Kkevsterrr/geneva
automated censorship evasion for the client-side and server-side
bao-project/bao-hypervisor
Bao, a Lightweight Static Partitioning Hypervisor
bouncaslab/TaXim
Taxim: A Toolchain for Automated and Configurable Simulation for Embedded Multiprocessor Design
Amirhossein-Esmaili/Energy_Aware_Task_Scheduling_in_MPSoCs
This software provides methods for energy-aware static scheduling of deadline-constrained task graphs in multiprocessor system-on-chip (MPSoC) platforms through integrated dynamic power management (DPM), and dynamic voltage and frequency scaling (DVFS).
iNCML/MachineLearningBook
The companion repository for the book "Machine Learning Fundamentals".
hamzehkhazaei/academic-kickstart
📝 Easily create a beautiful website using Academic, Hugo, and Netlify
tommychouyc/deterministic-atomic-buffering
csail-csg/riscy
Riscy Processors - Open-Sourced RISC-V Processors
darklife/darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
marg-tools/CoMeT
An EDA toolchain for integrated core-memory interval thermal simulations of 2D, 2.5, and 3D multi-/many-core processors
Remydeme/image-processing
Image processing algo in C for BMP format. Prewitt filter, K-means, sobel filter, histogram.
MicrochipTech/fpga-hls-examples
Open-Source HLS Examples for Microchip FPGAs
selendym/rv32i
rv32i - a simple RISC-V RV32I emulator