andreemedeiros
Software Testing | Hardware Verification | Undergraduate in Electrical Engineering (UFCG)
Federal University of Campina GrandeBrazil
Pinned Repositories
Adder-UVM
Basic verification environment using UVM.
andreemedeiros
andreemedeiros.github.io
https://andreemedeiros.github.io/
CIC-Filter
Cic Filter Analysis.
CPU-MIPS
Projeto de um processador MIPS ciclo único com instruções em Assembly em FPGA.
cypress-basico-v2
Repositório da versão 2 do curso básico de Cypress da Escola Talking About Testing
Print-Automation
Desktop Application to automate login in Amazon website and print the best-selling products.
RISC-X
A simple pipelined RISC-V core.
Smart-Home-RTOS
Real time smart home project.
Virtual-Supermarket
Virtual Supermarket System.
andreemedeiros's Repositories
andreemedeiros/Adder-UVM
Basic verification environment using UVM.
andreemedeiros/andreemedeiros.github.io
https://andreemedeiros.github.io/
andreemedeiros/Virtual-Supermarket
Virtual Supermarket System.
andreemedeiros/andreemedeiros
andreemedeiros/CIC-Filter
Cic Filter Analysis.
andreemedeiros/CPU-MIPS
Projeto de um processador MIPS ciclo único com instruções em Assembly em FPGA.
andreemedeiros/cypress-basico-v2
Repositório da versão 2 do curso básico de Cypress da Escola Talking About Testing
andreemedeiros/Print-Automation
Desktop Application to automate login in Amazon website and print the best-selling products.
andreemedeiros/RISC-X
A simple pipelined RISC-V core.
andreemedeiros/Smart-Home-RTOS
Real time smart home project.
andreemedeiros/SystemVerilog
Course solutions: Introduction to System Verilog - Siemens.