antmicro/yosys

Issues

• Signal wrongfully read as a wire instead of a register.

  #546 opened 3 years ago by suzizecat
  6

• Upstream changes required for uhdm-plugin

  #538 opened 3 years ago by kamilrakoczy
  0

• Extract uhdm frontend to independent yosys plugin

  #442 opened 3 years ago by pawelsag
  1

• Edalize uhdm support

  #443 opened 4 years ago by pawelsag
  0

• Quicklogic deduplication

  #5 opened 4 years ago by Ravenslofty
  9

• Quicklogic timings

  #7 opened 4 years ago by Ravenslofty
  5