Antmicro

Antmicro is a software-driven tech company developing open and modern industrial edge and cloud AI systems.

Pinned Repositories

fastvdma
Antmicro's fast, vendor-neutral DMA IP in Chisel
Language:Scala125 15 1126
gerber2ems
Python interface to OpenEMS, for PCB trace simulation. Accepts Gerber files as input. Features automatic grid generation and postprocessing.
Language:Python172 18 2221
google-coral-baseboard
Antmicro's open hardware baseboard for the Google Coral i.MX8 + Edge TPU SoM
78 14 1230
jetson-nano-baseboard
Antmicro's open hardware baseboard for the NVIDIA Jetson Nano, TX2 NX and Xavier NX
502 57 33174
jetson-orin-baseboard
Baseboard targetting the NVIDIA Jetson Orin Nano and Jetson Orin NX
177 12 1245
renode
Renode - virtual development tool for multinode embedded networks
Language:RobotFramework36 10 03
scalenode-cm4-baseboard
Baseboard for Raspberry Pi 4 Compute Module optimized for clustering
150 27 318
tensorflow-arduino-examples
TensorFlow Lite Micro examples built in collaboration between Google and Antmicro, runnable in Google Colab and with Renode CI tests
Language:Shell25 13 24
zynq-mkbootimage
An open source replacement of the Xilinx bootgen application.
Language:C112 17 855
zynq-video-board
Open Hardware carrier board supporting modules with Zynq 7000 All Programmable SoC devices.
60 14 029

Antmicro's Repositories

antmicro/rdfm
Language:Python36 10 08
antmicro/renode
Renode - virtual development tool for multinode embedded networks
Language:RobotFramework36 10 03
antmicro/hardware-components
Language:Python35 8 12
antmicro/verilator-verification
Test dashboard for verification features in Verilator
Language:SystemVerilog28 9 55
antmicro/dts2repl
Language:Python25 11 57
antmicro/verilator
Verilator open-source SystemVerilog simulator and lint system
Language:C++22 3 03
antmicro/tlib
Language:C++21 10 033
antmicro/protoplaster
Language:Python15 7 02
antmicro/TermSharp
Terminal widget for XWT with VT100 support
Language:C#14 14 34
antmicro/zephyr
Primary GIT Repository for the Zephyr Project
Language:C12 13 16
antmicro/zephelin
Language:Python102
antmicro/renode-dpi-examples
Language:CMake5 12 36
antmicro/testplanner
Language:Python5
antmicro/verible-indexer
Language:Python5 12 03
antmicro/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Language:Verilog2 1 0
antmicro/sv-tests
Test suite designed to check compliance with the SystemVerilog standard.
Language:SystemVerilog2 2 02
antmicro/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
Language:Jupyter Notebook1 5 02
antmicro/test-colabs
Language:Jupyter Notebook1 11 0
antmicro/bazel_rules_hdl
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
Language:Starlark1 0
antmicro/caliptra-ss
HW Design Collateral for Caliptra Subsystem, which comprises Caliptra RoT IP and additional manufacturer controls.
Language:SystemVerilog0 0
antmicro/designer-graphs
antmicro/designer-media-files
6 0
antmicro/github-runner-test
Language:Shell10 03
antmicro/guineveer
Language:C
antmicro/i3c-core
Language:SystemVerilog0 01
antmicro/info-process
Language:Python10 0
antmicro/PeakRDL-ipxact
Import and export IP-XACT XML register models
antmicro/pigweed-mimxrt595-samples
Language:C6 0
antmicro/speedscope
🔬 A fast, interactive web-based viewer for performance profiles.
Language:TypeScript
antmicro/xwt
Language:C#14 0