This repository contains a simple PYNQ design that calculates correlation coefficients from two given signals. This function will be implemented in FPGA via Xilinx HLS, it is called ''getCorrelator''.
The tutorial will cover the PYNQ design flow, including how to port a C function into HLS styled C in Vitis HLS, how to Vivado block design for KV260, how to create a PYNQ overlay, how to use the overlay in python environment.
Jie Lei
, Universitat Politècnica de Valencia, SpainHans Jakob Damsgaard
, Tampere University, FinlandAntoine Grenier
, Tampere University, Finland
Tutorial 1: Porting a C function to Xilinx HLS, with stream interface
Tutorial 2: Using Xilinx FFT IP with DMA and AXI mater interface
Tutorial 3: DMA with HLS stream based IP
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This work is also within the scope of the Hardware acceleration for GNSS receiver project called Hard Sydr. The Python version of this project is called Sydr. https://github.com/aproposorg/sydr
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The work is conducted within the project APROPOS. This project has received funding from the European Union’s Horizon 2020 (H2020) Marie Sklodowska-Curie Innovative Training Networks H2020-MSCA-ITN-2020 call, under the Grant Agreement no 956090. Project link: https://apropos-project.eu/
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License: MIT Copyright (c) 2023 APROPOS
Sydr
An open-source GNSS Software Defined Radio for algorithm benchmarking. https://github.com/aproposorg/sydr developed by Antoine Grenier.- AMD Xilinx tutorial.