xilinx-fpga
There are 217 repositories under xilinx-fpga topic.
open-sdr/openwifi
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
f4pga/prjxray
Documenting the Xilinx 7-series bit-stream format.
f4pga/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
fpgasystems/Coyote
Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous platforms.
ultraembedded/openlogicbit
Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.
ingonyama-zk/blaze
blaze is a Rust library for ZK acceleration on Xilinx FPGAs.
triSYCL/sycl
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
derekmulcahy/xvcpi
Xilinx Virtual Cable Server for Raspberry Pi
ultraembedded/core_ft60x_axi
FTDI FT600 SuperSpeed USB3.0 to AXI bus master
chipsalliance/yosys-f4pga-plugins
Plugins for Yosys developed as part of the F4PGA project.
ultraembedded/core_dvi_framebuffer
Minimal DVI / HDMI Framebuffer
f4pga/prjuray
Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
f4pga/prjxray-db
Project X-Ray Database: XC7 Series
diogofferreira/fpga-miner
:moneybag: A simplified version of an FPGA bitcoin miner :moneybag:
pontazaricardo/Verilog_Calculator_Matrix_Multiplication
This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
fredrequin/verilator_xilinx
Re-coded Xilinx primitives for Verilator use
ingonyama-zk/open-binius
building blocks for accelerating ZK proofs over binary fields
stevenbell/csirx
Open-source CSI-2 receiver for Xilinx UltraScale parts
sailordiary/computer-systems-ucas
**科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session
hex-five/multizone-fpga
This repository contains the hardware design source files of the Hex Five X300 RISC-V SoC. The X300 is Hex Five's official reference HW platform for its MultiZone Trusted Execution Environment and MultiZone Trusted Firmware. The X300 is an enhanced secure version of the SiFive's Freedom E300 built around the Rocket chip developed at U.C. Berkeley.
KarenOk/SAP-1-Computer
Design and Implementation of a Simple-As-Possible 1 (SAP-1) Computer using an FPGA and VHDL.
olivier-le-sage/camera-filters
Colorspace conversion, gamma correction, and more -- all integrated within a MIPI-to-HDMI pipeline in FPGA.
geraked/verilog-rle
Verilog Implementation of Run Length Encoding for RGB Image Compression
mcagriaksoy/VHDL-FPGA-LAB_PROJECTS
My Lab Assigments from Bachelor Degree, This repo includes the projects for digital systems II Lecture (EEM334)
sarthak268/Embedded_Logic_and_Design
This repository contains all labs done as a part of the Embedded Logic and Design course.
Wissance/QuickSPI
Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
hex-five/multizone-iot-sdk
MultiZone® Trusted Firmware is the quick and safe way to build secure IoT applications with any RISC-V processor. It provides secure access to commercial and private IoT clouds, real-time monitoring, secure boot, and remote firmware updates. The built-in Trusted Execution Environment provides hardware-enforced separation ...
splAcharya/DigitalOscilloscope_Zynq7000Soc
A digital Oscilloscope designed using Zedboard (Zynq7000Soc). The input signal is sample and processed using Zedboard and the sample data is displayed using a Graphical User Interface which mimics an Oscilloscope.
Multimedia-Processing/Digital-Logic-Design
透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。
charkster/spi_slave_verilog
SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs
SalvatoreBarone/CNN-VHDL
A library of VHDL components for Neural Networks
siorpaes/SimpleSoC
Very simple Cortex-M1 SoC design based on ARM DesignStart
Thraetaona/Innervator
Innervator: Hardware Acceleration for Neural Networks
theshadowx/keyboard-ip
PS/2 Keyboard IP written in VHDL for Xilinx FPGA
mattuna15/merlin
Learn how to create your own 32-bit system from scratch.
mcedrdiego/Kria_yolov3_ppe
Xilinx Kria KV260 Real-time PPE detection