f4pga/f4pga-arch-defs

Issues

• A serious bug in artix7 - negedge clk not work

  #3684 opened 8 months ago by lehaifeng000
  0

• Fix IBUFDS_GTE to GTP_COMMON connection

  #2328 opened 3 years ago by acomodi
  1

• linux-aarch64 Support

  #3614 opened 10 months ago by Willmac16
  0

• Need help adding support for Spartan-7 board to arch-defs

  #2372 opened 3 years ago by MidsummerNight
  8

• IP Core's support

  #3529 opened a year ago by gxman
  0

• Packing maybe failed while using primitive oserdese

  #3274 opened 2 years ago by the-centry
  0

• How to write a new pb_model?

  #2680 opened 2 years ago by the-centry
  2

• Error instantiating qlal4s3b_cell_macro with new names (Clk_Cxx)

  #2348 opened 3 years ago by carlosedp
  2

• what's the effect of ".subckt T_INV" in xc ?

  #2748 opened 2 years ago by the-centry
  0

• using different tools interchangeably

  #3166 opened 2 years ago by mohammadshahidzade
  1

• Add `xc7z020clg400-1` part to artifacts

  #3058 opened 2 years ago by Asoftyn
  1

• MMCM for Zynq

  #2979 opened 2 years ago by darktjm
  3

• symbiflow_route needs to fail when timing is not met

  #2331 opened 3 years ago by tcal-x
  6

• Move the guidelines to build example and load bitstream out from the Getting Started section

  #2668 opened 2 years ago by umarcor
  0

• Add a/the requirements file to the arch-defs-install package

  #2696 opened 2 years ago by umarcor
  1

• "latest" files in GCS buckets no longer updated

  #2655 opened 3 years ago by Xiretza
  3

• Add `xc7z020clg484-1` part to artifacts

  #2737 opened 3 years ago by wkkuna
  2

• Optimise CI workflow and reorganise the content accordingly

  #2673 opened 3 years ago by umarcor
  1

• Xilinx vendor tests are failing on master?

  #2324 opened 3 years ago by mithro
  2

• Update tests in job 'install' to use 'f4pga build' instead of the shell wrappers

  #2669 opened 3 years ago by umarcor
  0

• Process of adding a new architecture

  #2344 opened 3 years ago by apond308
  4

• README instructions incomplete

  #2343 opened 3 years ago by jrrk2
  0

• Supporting Ultrascale+ is in plan?

  #2620 opened 3 years ago by the-centry
  3

• How to generate the rrg and arch.timing.xml basing database provided by RapidWright?

  #2600 opened 3 years ago by the-centry
  1

• Need help to verify arch.*.xml and rr_graph.bin on spartan7

  #2584 opened 3 years ago by KKtiandao
  6

• Broken link to the prebuilt architecture definition files in README.md

  #2370 opened 3 years ago by hansfbaier
  2

• VPR fails to place long carry chains on xc7

  #2463 opened 3 years ago by kazkojima
  3

• Missing utility to find symbiflow techmap/scripts path

  #2373 opened 3 years ago by olofk
  0

• xc7a50t_test database does not contain the part xc7a35tftg256-1

  #2368 opened 3 years ago by hansfbaier
  4

• arch-defs not downloading the latest version of prjxray-db when building

  #2351 opened 3 years ago by MidsummerNight
  6

• toolchain fails, when using ISERDESE2 in OVERSAMPLE mode (xc7, arty_a7 35)

  #2337 opened 3 years ago by bl0x
  1

• Check-status CI job is failing?

  #2363 opened 3 years ago by mithro
  5

• symbiflow_place exit with code 1

  #2362 opened 3 years ago by fontamsoc
  1

• vpr_io_place.py fails when no pcf file is provided

  #2361 opened 3 years ago by mithro
  0

• Delete utils/vpr_fixup_post_synth.py

  #2358 opened 3 years ago by mithro
  1

• qlpfpga-symbiflow-plugins submodule checkout error

  #2338 opened 3 years ago by chmorgan
  1

• Why does PLL define a COMPENSATION value when that is not used?

  #2341 opened 3 years ago by nelsobe
  1

• patch is required but is not a dependency of this project

  #2342 opened 3 years ago by jrrk2
  0

• Fix logic placement connected to IBUFDS_GTE clock

  #2327 opened 3 years ago by acomodi
  0

• MMCM primitive generate incorect clock frequencies in hardware

  #2248 opened 3 years ago by WhiteNinjaZ
  14

• Conda lock pull requests not running CI?

  #2319 opened 3 years ago by mithro
  7

• Missing Xilinx 7-series FPGA model: xc7a50tcsg324-1

  #2305 opened 3 years ago by gergoerdi
  3

• Conda lock pull requests not getting merged

  #2320 opened 3 years ago by mithro
  0

• Wrong synthesis result when `signed` signal is used for bit indexing

  #2307 opened 3 years ago by gergoerdi
  8

• Better documentation for adding and running tests

  #2312 opened 3 years ago by WhiteNinjaZ
  1

• Wrong in generate rr_graph.real.patched.bin

  #2309 opened 3 years ago by szhou888
  2

• Block RAMs with big data width gives wrong results

  #2304 opened 3 years ago by syed-ahmed
  0

• Add a way to programattically cache and query for arch files

  #2301 opened 3 years ago by olofk
  0

• Vendor Tools failing with RTRES-2

  #2297 opened 3 years ago by acomodi
  0

• How to generate bitstream targeting customized FPGA

  #2247 opened 3 years ago by xtthu
  0