hdl
There are 801 repositories under hdl topic.
langhuihui/monibuca
🧩 Monibuca is a Modularized, Extensible framework for building Streaming Server
stnolting/neorv32
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
amaranth-lang/amaranth
A modern hardware definition language and toolchain based on Python
analogdevicesinc/hdl
HDL libraries and projects
aappleby/metroboy
A repository of gate-level simulators and tools for the original Game Boy.
drom/awesome-hdl
Hardware Description Languages
veryl-lang/veryl
Veryl: A Modern Hardware Description Language
m-labs/nmigen
A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen
WangXuan95/BSV_Tutorial_cn
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。
intel/rohd
The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
Nuand/bladeRF-wiphy
bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem
pymtl/pymtl3
Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
analogdevicesinc/plutosdr-fw
PlutoSDR Firmware
slaclab/surf
A huge VHDL library for FPGA and digital ASIC development
tensil-ai/tensil
Open source machine learning accelerators
dpretet/async_fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
viduraakalanka/HDL-Bits-Solutions
This is a repository containing solutions to the problem statements given in HDL Bits website.
chipsalliance/sv-tests
Test suite designed to check compliance with the SystemVerilog standard.
spamegg1/reviews
Reviewing some online CS courses I took
Kitware/VeloView
VeloView performs real-time visualization and easy processing of live captured 3D LiDAR data from Velodyne sensors (Alpha Prime™, Puck™, Ultra Puck™, Puck Hi-Res™, Alpha Puck™, Puck LITE™, HDL-32, HDL-64E). Runs on Windows, Linux and MacOS. This repository is a mirror of https://gitlab.kitware.com/LidarView/VeloView-Velodyne.
f4pga/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
UCSBarchlab/PyRTL
A collection of classes providing simple hardware specification, simulation, tracing, and testing suitable for teaching and research. Simplicity, usability, clarity, and extensibility are the overarching goals, rather than performance or optimization.
tymonx/logic
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
kactus2/kactus2dev
Kactus2 is a graphical EDA tool based on the IP-XACT standard.
masc-ucsc/livehd
Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation
suoto/hdl_checker
Repurposing existing HDL tools to help writing better code
catkira/open5G_phy
A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog
stnolting/neoTRNG
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
yupferris/kaze
An HDL embedded in Rust.
furrtek/SiliconRE
Traces, schematics, and general infos about custom chips reverse-engineered from silicon
kevinpt/symbolator
HDL symbol generator
google/pcbdl
PCB Design Language: A programming way to design schematics.
nand2tetris/web-ide
A web-based IDE for https://nand2tetris.org
aappleby/metron
A C++ to Verilog translation tool with some basic guarantees that your code will work.
1801BM1/cpu11
Revengineered ancient PDP-11 CPUs, originals and clones
im-tomu/fomu-workshop
Support files for participating in a Fomu workshop