chipsalliance/sv-tests
Test suite designed to check compliance with the SystemVerilog standard.
SystemVerilogISC
Issues
- 0
CI fails with simplesat 0.9.0
#6032 opened by matlupi - 3
VeeR EL2 core is broken
#5801 opened by MikePopoloski - 11
Ariane core test is still broken
#5807 opened by MikePopoloski - 1
Dependabot broken since ~March 13th
#5810 opened by wsnyder - 0
Ariane core test is broken
#5799 opened by MikePopoloski - 1
RgGen core is broken
#5800 opened by MikePopoloski - 0
Adding opl3_fpga to cores
#5804 opened by hzeller - 1
UVM-related tests come with undefined package's import
#5798 opened by ssmolov - 7
Yosys SV Support Misrepresented Due to $display
#5082 opened by sifferman - 0
Adding svase to tools
#5018 opened by hzeller - 0
Fix Veer-EL2 with Verilator
#4941 opened by wsnyder - 5
Backout RgGen?
#4776 opened by wsnyder - 6
11.4.8: continuous assignments races with initial block
#4751 opened by caryr - 2
scr1: missing include directory ?
#4548 opened by hzeller - 1
tree-sitter-verilog: essentially all tests fail with "Incompatible Language version"
#4549 opened by hzeller - 2
output the line number of the source file where the node resides in AST json file
#3932 opened by KingkingLiu - 1
ariane file set is out of sync with ariane core
#3776 opened by alaindargelas - 1
Need more tests
#3551 opened by MikePopoloski - 0
table headers obstruct log-file view
#3806 opened by hzeller - 0
- 2
tools/sv-report very slow
#2749 opened by hzeller - 0
a way to make the Pyhon dependencies more hermetic ?
#3305 opened by hzeller - 0
Create anchor for sub-tables
#3149 opened by hzeller - 0
Include column sorting option in URL
#3140 opened by hzeller - 3
Tests for proper simulation semantics?
#2522 opened by Kuree - 2
RSD core is broken
#2137 opened by MikePopoloski - 6
- 2
SweRV core is broken
#2169 opened by MikePopoloski - 1
Link to UTD-SV tests broken on sv-tests-results page
#1827 opened by sw23 - 2
BlackParrot setup for UhdmYosys
#2046 opened by alaindargelas - 3
Earlgrey design is not complete
#1867 opened by alaindargelas - 3
Breakout the pass/fail criteria to be per mode
#1799 opened by jrudess - 3
- 2
uhdmyosys all failing due to missing shared library
#1758 opened by hzeller - 0
- 3
uhdm-common fails to build
#1759 opened by toddstrader - 0
projf-explore tests are not complete cose
#1870 opened by wsnyder - 1
Surelog submodule points to a wrong repo
#1868 opened by tgorochowik - 10
Tools not being updated again
#1744 opened by MikePopoloski - 4
How to change the max memory limit for certain tests, and globably for a runner
#1839 opened by alaindargelas - 0
Remove -nobuiltin option from Surelog runner
#1838 opened by alaindargelas - 1
Increase Timeout on Black-parrot elaboration tests
#1856 opened by alaindargelas - 6
No report created when only one runner is ran
#1797 opened by alaindargelas - 4
- 2
Add new "elaboration" test type
#1770 opened by tgorochowik - 2
Display which test-types are running for each tool
#1800 opened by jrudess - 1
`defines set from library imports are not retained
#1801 opened by jrudess - 0
Can hdlconvert tests be bumped to latest?
#1756 opened by MikePopoloski - 0
Add wav-lpddr-hw to sv-tests
#1723 opened by alaindargelas - 0
history graph: take current build into account
#1707 opened by tgorochowik