Pinned Repositories
FPGA-Ethernet-Communication
An Ethernet based communication interface between two FPGAs through hardware description on VHDL and Verilog.
inference-accelerator
A scalable and configurable CNN Hardware Accelerator. Having a flexible software stack and control unit, a single synthesized hardware can run inference on multiple CNN models. The hardware can also be synthesized for various operational scales using configurable system parameters.
snnhardware
Multi Layer hardware implementation of Spiking Neural Network
SVM-Gaussian-Classification-FPGA
SVM Gaussian Classifier of 30x30 greyscale image on Verilog
Ethernet-Communication-between-FPGAs
A communication interface between two FPGAs is developed which sends data through ethernet channel and employs arp, ethernet, ip and udp protocols and has a packet flow control mechanism. The hardware is described in Verilog and VHDL.
Spiking-Neural-Network
Pure python implementation of SNN
arpanvyas's Repositories
arpanvyas/snnhardware
Multi Layer hardware implementation of Spiking Neural Network
arpanvyas/inference-accelerator
A scalable and configurable CNN Hardware Accelerator. Having a flexible software stack and control unit, a single synthesized hardware can run inference on multiple CNN models. The hardware can also be synthesized for various operational scales using configurable system parameters.
arpanvyas/FPGA-Ethernet-Communication
An Ethernet based communication interface between two FPGAs through hardware description on VHDL and Verilog.
arpanvyas/SVM-Gaussian-Classification-FPGA
SVM Gaussian Classifier of 30x30 greyscale image on Verilog