brightclark's Stars
sphinx-doc/sphinx
The Sphinx documentation generator
ServiceStack/ServiceStack
Thoughtfully architected, obscenely fast, thoroughly enjoyable web services for all
bjmashibing/InternetArchitect
年薪百万互联网架构师课程文档及源码(公开部分)
xingshaocheng/architect-awesome
后端架构师技术图谱
openAUTOSAR/classic-platform
Open source AUTOSAR classic platform forked from the Arctic Core
autoas/ssas-public
Simple AUTOSAR Basic Software
ZipCPU/interpolation
Digital Interpolation Techniques Applied to Digital Signal Processing
cycfi/q
C++ Library for Audio Digital Signal Processing
magenta/ddsp
DDSP: Differentiable Digital Signal Processing
ethz-asl/rotors_simulator
RotorS is a UAV gazebo simulator
petercorke/robotics-toolbox-python
Robotics Toolbox for Python
onlytailei/CppRobotics
cpp implementation of robotics algorithms including localization, mapping, SLAM, path planning and control
wzpan/dingdang-robot
🤖 叮当是一款可以工作在 Raspberry Pi 上的中文语音对话机器人/智能音箱项目。
NxRLab/ModernRobotics
Modern Robotics: Mechanics, Planning, and Control Code Library --- The primary purpose of the provided software is to be easy to read and educational, reinforcing the concepts in the book. The code is optimized neither for efficiency nor robustness.
ros-industrial/universal_robot
ROS-Industrial Universal Robots support (https://wiki.ros.org/universal_robot)
kiloreux/awesome-robotics
A list of awesome Robotics resources
AtsushiSakai/PythonRobotics
Python sample codes for robotics algorithms.
muhammadaldacher/Analog-Design-of-1.9-GHz-PLL-system
This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
PyHDI/veriloggen
Veriloggen: A Mixed-Paradigm Hardware Construction Framework
clash-lang/clash-compiler
Haskell to VHDL/Verilog/SystemVerilog compiler
Obijuan/open-fpga-verilog-tutorial
Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
verilog-to-routing/vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
alexforencich/verilog-pcie
Verilog PCI express components
pConst/basic_verilog
Must-have verilog systemverilog modules
alexforencich/verilog-ethernet
Verilog Ethernet components for FPGA implementation
steveicarus/iverilog
Icarus Verilog
THU-DSP-LAB/ventus-gpgpu
GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
drom/awesome-hdl
Hardware Description Languages
Nic30/hdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
koide3/hdl_graph_slam
3D LIDAR-based Graph SLAM