some more protocol decoding

I am working on ARM version of wch-link. It seems when using the WCH-Link utility the same protocol is used
So here is the 0x0c cmd. Maybe this can help on the RISC part too.

request:
0x81 0x0C 0x02 Target CPU speed

response:
0x82 0x0C 0x01 OK

Target CPU 0x04 = F103
0x08 = F203

Speed 1..3 means slow medium fast
Speed 0 maybe default?
OK response = 0x01

Many thanks:
I'll add the docs.

wlink/src/operations.rs

Lines 32 to 36 in 085b39b

    
           self.send_command(commands::SetTwoLineMode { 
        
               riscvchip: expected_chip.unwrap_or(RiscvChip::CH32V30X) as u8, 
        
               speed: 1, // 1 high, 2, medium, 3 low 
        
           })?;

I need a better scheme to document the protocol. @septs Any ideas?

some update from the ARM impementation. 0x01..0x03 from the clk speed dropdown
speed =0x00 ultrafast (no Pindelay) -> maybe unused estimate 2 MHz
speed = 0x01 fast (1 µs Pindelay) about 500kHz
speed = 0x02 medium (2 µs Pindelay) about 250KHz
speed = 0x03 slow buggy (20 nops delay which is about 0.8 µs @24MHz xtal

close as completed

	self.send_command(commands::SetTwoLineMode {
	riscvchip: expected_chip.unwrap_or(RiscvChip::CH32V30X) as u8,
	speed: 1, // 1 high, 2, medium, 3 low
	})?;