Debug Module did not become active. dmcontrol=0x0
kingstone1927 opened this issue · 1 comments
I implemented SweRV_EH1 on a Zedboard fpga. I am trying to use openOCD and Jtag Arm-USB-Tiny_H to download code to the board as instructed in the README. I have checked the physical connection and make sure it be correctly connected to the Pmod on the Zedboard. Does anyone know what could potentially cause this error and ways to fix it?
I run:
openocd -f swerv_openocd.cfg
here is the error I got:
Open On-Chip Debugger 0.10.0+dev-01404-g1ba1b8784 (2020-10-26-11:36)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : clock speed 10 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x00000001 (mfg: 0x000 (), part: 0x0000, ver: 0x0)
Error: Debug Module did not become active. dmcontrol=0x0
Info : starting gdb server for riscv.cpu on 3333
Info : Listening on port 3333 for gdb connections
Error: Target not examined yet
Here is what it shows when I run with -d3 flag
/riscv-home/Cores-SweRV_fpga/software/bsp$ openocd -d3 -f swerv_openocd.cfg
Open On-Chip Debugger 0.10.0+dev-01404-g1ba1b8784 (2020-10-26-11:36)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
User : 13 1 options.c:63 configuration_output_handler(): debug_level: 3
User : 14 1 options.c:63 configuration_output_handler():
Debug: 15 2 options.c:244 add_default_dirs(): bindir=/usr/local/bin
Debug: 16 2 options.c:245 add_default_dirs(): pkgdatadir=/usr/local/share/openocd
Debug: 17 2 options.c:246 add_default_dirs(): exepath=/usr/local/bin
Debug: 18 2 options.c:247 add_default_dirs(): bin2data=../share/openocd
Debug: 19 2 configuration.c:42 add_script_search_dir(): adding /home/riscv/.config/openocd
Debug: 20 2 configuration.c:42 add_script_search_dir(): adding /home/riscv/.openocd
Debug: 21 2 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/site
Debug: 22 2 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/scripts
Debug: 23 2 configuration.c:97 find_file(): found swerv_openocd.cfg
Debug: 24 2 command.c:146 script_debug(): command - adapter speed 100
Debug: 26 2 core.c:1822 jtag_config_khz(): handle jtag khz
Debug: 27 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 28 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 29 2 command.c:146 script_debug(): command - adapter driver ftdi
Debug: 31 2 command.c:352 register_command_handler(): registering 'ftdi_device_desc'...
Debug: 32 2 command.c:352 register_command_handler(): registering 'ftdi_serial'...
Debug: 33 2 command.c:352 register_command_handler(): registering 'ftdi_channel'...
Debug: 34 2 command.c:352 register_command_handler(): registering 'ftdi_layout_init'...
Debug: 35 2 command.c:352 register_command_handler(): registering 'ftdi_layout_signal'...
Debug: 36 2 command.c:352 register_command_handler(): registering 'ftdi_set_signal'...
Debug: 37 2 command.c:352 register_command_handler(): registering 'ftdi_get_signal'...
Debug: 38 2 command.c:352 register_command_handler(): registering 'ftdi_vid_pid'...
Debug: 39 2 command.c:352 register_command_handler(): registering 'ftdi_tdo_sample_edge'...
Debug: 40 2 command.c:352 register_command_handler(): registering 'ftdi_oscan1_mode'...
Debug: 41 2 command.c:146 script_debug(): command - ftdi_device_desc Olimex OpenOCD JTAG ARM-USB-TINY-H
Debug: 43 2 command.c:146 script_debug(): command - ftdi_vid_pid 0x15ba 0x002a
Debug: 45 2 command.c:146 script_debug(): command - ftdi_layout_init 0x0808 0x0a1b
Debug: 47 2 command.c:146 script_debug(): command - ftdi_layout_signal nSRST -oe 0x0200
Debug: 49 2 command.c:146 script_debug(): command - ftdi_layout_signal LED -data 0x0800
Debug: 51 2 command.c:146 script_debug(): command - transport select jtag
Debug: 52 2 command.c:352 register_command_handler(): registering 'jtag_flush_queue_sleep'...
Debug: 53 2 command.c:352 register_command_handler(): registering 'jtag_rclk'...
Debug: 54 2 command.c:352 register_command_handler(): registering 'jtag_ntrst_delay'...
Debug: 55 2 command.c:352 register_command_handler(): registering 'jtag_ntrst_assert_width'...
Debug: 56 2 command.c:352 register_command_handler(): registering 'scan_chain'...
Debug: 57 2 command.c:352 register_command_handler(): registering 'runtest'...
Debug: 58 2 command.c:352 register_command_handler(): registering 'irscan'...
Debug: 59 2 command.c:352 register_command_handler(): registering 'verify_ircapture'...
Debug: 60 2 command.c:352 register_command_handler(): registering 'verify_jtag'...
Debug: 61 2 command.c:352 register_command_handler(): registering 'tms_sequence'...
Debug: 62 2 command.c:352 register_command_handler(): registering 'wait_srst_deassert'...
Debug: 63 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 64 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 65 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 66 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 67 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 68 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 69 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 70 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 71 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 72 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 73 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 74 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 75 2 command.c:352 register_command_handler(): registering 'jtag'...
Debug: 76 2 command.c:352 register_command_handler(): registering 'svf'...
Debug: 77 2 command.c:352 register_command_handler(): registering 'xsvf'...
Debug: 78 2 command.c:146 script_debug(): command - jtag newtap riscv cpu -irlen 5 -expected-id 0x01
Debug: 79 2 tcl.c:566 jim_newtap_cmd(): Creating New Tap, Chip: riscv, Tap: cpu, Dotted: riscv.cpu, 4 params
Debug: 80 2 tcl.c:591 jim_newtap_cmd(): Processing option: -irlen
Debug: 81 2 tcl.c:591 jim_newtap_cmd(): Processing option: -expected-id
Debug: 82 2 core.c:1484 jtag_tap_init(): Created Tap: riscv.cpu @ abs position 0, irlen 5, capture: 0x1 mask: 0x3
Debug: 83 2 command.c:146 script_debug(): command - target create riscv.cpu riscv -chain-position riscv.cpu
Debug: 84 2 target.c:2004 target_free_all_working_areas_restore(): freeing all working areas
Debug: 85 2 riscv.c:428 riscv_create_target(): riscv_create_target()
Debug: 86 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 87 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 88 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 89 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 90 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 91 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 92 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 93 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 94 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 95 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 96 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 97 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 98 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 99 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 100 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 101 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 102 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 103 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 104 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 105 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 106 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 107 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 108 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 109 7 command.c:352 register_command_handler(): registering 'riscv'...
Debug: 110 7 command.c:352 register_command_handler(): registering 'arm'...
Debug: 111 7 command.c:352 register_command_handler(): registering 'arm'...
Debug: 112 7 command.c:352 register_command_handler(): registering 'arm'...
Debug: 113 7 command.c:352 register_command_handler(): registering 'arm'...
Debug: 114 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 115 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 116 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 117 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 118 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 119 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 120 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 121 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 122 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 123 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 124 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 125 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 126 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 127 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 128 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 129 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 130 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 131 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 132 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 133 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 134 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 135 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 136 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 137 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 138 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 139 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 140 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 141 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 142 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 143 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 144 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 145 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 146 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 147 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 148 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 149 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 150 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 151 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 152 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 153 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 154 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 155 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 156 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 157 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 158 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 159 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 160 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 161 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 162 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 163 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 164 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 165 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 166 7 command.c:352 register_command_handler(): registering 'riscv.cpu'...
Debug: 167 7 command.c:146 script_debug(): command - riscv set_mem_access progbuf
Debug: 169 7 command.c:146 script_debug(): command - init
Debug: 171 7 command.c:146 script_debug(): command - target init
Debug: 173 7 command.c:146 script_debug(): command - target names
Debug: 174 7 command.c:146 script_debug(): command - riscv.cpu cget -event gdb-flash-erase-start
Debug: 175 7 command.c:146 script_debug(): command - riscv.cpu configure -event gdb-flash-erase-start reset init
Debug: 176 7 command.c:146 script_debug(): command - riscv.cpu cget -event gdb-flash-write-end
Debug: 177 7 command.c:146 script_debug(): command - riscv.cpu configure -event gdb-flash-write-end reset halt
Debug: 178 7 command.c:146 script_debug(): command - riscv.cpu cget -event gdb-attach
Debug: 179 7 command.c:146 script_debug(): command - riscv.cpu configure -event gdb-attach halt 1000
Debug: 180 7 target.c:1465 handle_target_init_command(): Initializing targets...
Debug: 181 8 riscv.c:439 riscv_init_target(): riscv_init_target()
Debug: 182 8 semihosting_common.c:97 semihosting_common_init():
Debug: 183 8 command.c:352 register_command_handler(): registering 'target_request'...
Debug: 184 8 command.c:352 register_command_handler(): registering 'trace'...
Debug: 185 8 command.c:352 register_command_handler(): registering 'trace'...
Debug: 186 8 command.c:352 register_command_handler(): registering 'fast_load_image'...
Debug: 187 8 command.c:352 register_command_handler(): registering 'fast_load'...
Debug: 188 8 command.c:352 register_command_handler(): registering 'profile'...
Debug: 189 8 command.c:352 register_command_handler(): registering 'virt2phys'...
Debug: 190 8 command.c:352 register_command_handler(): registering 'reg'...
Debug: 191 8 command.c:352 register_command_handler(): registering 'poll'...
Debug: 192 8 command.c:352 register_command_handler(): registering 'wait_halt'...
Debug: 193 8 command.c:352 register_command_handler(): registering 'halt'...
Debug: 194 8 command.c:352 register_command_handler(): registering 'resume'...
Debug: 195 8 command.c:352 register_command_handler(): registering 'reset'...
Debug: 196 8 command.c:352 register_command_handler(): registering 'soft_reset_halt'...
Debug: 197 8 command.c:352 register_command_handler(): registering 'step'...
Debug: 198 8 command.c:352 register_command_handler(): registering 'mdd'...
Debug: 199 8 command.c:352 register_command_handler(): registering 'mdw'...
Debug: 200 8 command.c:352 register_command_handler(): registering 'mdh'...
Debug: 201 8 command.c:352 register_command_handler(): registering 'mdb'...
Debug: 202 8 command.c:352 register_command_handler(): registering 'mwd'...
Debug: 203 8 command.c:352 register_command_handler(): registering 'mww'...
Debug: 204 8 command.c:352 register_command_handler(): registering 'mwh'...
Debug: 205 8 command.c:352 register_command_handler(): registering 'mwb'...
Debug: 206 8 command.c:352 register_command_handler(): registering 'bp'...
Debug: 207 8 command.c:352 register_command_handler(): registering 'rbp'...
Debug: 208 8 command.c:352 register_command_handler(): registering 'wp'...
Debug: 209 8 command.c:352 register_command_handler(): registering 'rwp'...
Debug: 210 8 command.c:352 register_command_handler(): registering 'load_image'...
Debug: 211 8 command.c:352 register_command_handler(): registering 'dump_image'...
Debug: 212 8 command.c:352 register_command_handler(): registering 'verify_image_checksum'...
Debug: 213 8 command.c:352 register_command_handler(): registering 'verify_image'...
Debug: 214 8 command.c:352 register_command_handler(): registering 'test_image'...
Debug: 215 8 command.c:352 register_command_handler(): registering 'reset_nag'...
Debug: 216 8 command.c:352 register_command_handler(): registering 'ps'...
Debug: 217 8 command.c:352 register_command_handler(): registering 'test_mem_access'...
Debug: 218 8 ftdi.c:721 ftdi_initialize(): ftdi interface using shortest path jtag state transitions
Debug: 219 17 mpsse.c:422 mpsse_purge(): -
Debug: 220 18 mpsse.c:703 mpsse_loopback_config(): off
Debug: 221 18 mpsse.c:748 mpsse_set_frequency(): target 100000 Hz
Debug: 222 18 mpsse.c:740 mpsse_rtck_config(): off
Debug: 223 18 mpsse.c:729 mpsse_divide_by_5_config(): off
Debug: 224 18 mpsse.c:709 mpsse_set_divisor(): 299
Debug: 225 18 mpsse.c:772 mpsse_set_frequency(): actually 100000 Hz
Debug: 226 18 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 227 18 core.c:1789 adapter_khz_to_speed(): have interface set up
Debug: 228 18 mpsse.c:748 mpsse_set_frequency(): target 100000 Hz
Debug: 229 18 mpsse.c:740 mpsse_rtck_config(): off
Debug: 230 18 mpsse.c:729 mpsse_divide_by_5_config(): off
Debug: 231 18 mpsse.c:709 mpsse_set_divisor(): 299
Debug: 232 18 mpsse.c:772 mpsse_set_frequency(): actually 100000 Hz
Debug: 233 18 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 234 18 core.c:1789 adapter_khz_to_speed(): have interface set up
Info : 235 18 core.c:1565 adapter_init(): clock speed 100 kHz
Debug: 236 18 openocd.c:141 handle_init_command(): Debug Adapter init complete
Debug: 237 18 command.c:146 script_debug(): command - transport init
Debug: 239 18 transport.c:239 handle_transport_init(): handle_transport_init
Debug: 240 18 core.c:830 jtag_add_reset(): SRST line released
Debug: 241 18 core.c:855 jtag_add_reset(): TRST line released
Debug: 242 18 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 243 19 command.c:146 script_debug(): command - jtag arp_init
Debug: 244 19 core.c:1578 jtag_init_inner(): Init JTAG chain
Debug: 245 19 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 246 19 core.c:1243 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 247 19 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 248 26 jep106.c:33 jep106_manufacturer(): BUG: Caller passed out-of-range JEP106 ID!
Info : 249 26 core.c:1142 jtag_examine_chain_display(): JTAG tap: riscv.cpu tap/device found: 0x00000001 (mfg: 0x000 (), part: 0x0000, ver: 0x0)
Debug: 250 26 core.c:1374 jtag_validate_ircapture(): IR capture validation scan
Debug: 251 27 core.c:1431 jtag_validate_ircapture(): riscv.cpu: IR capture 0x01
Debug: 252 27 command.c:146 script_debug(): command - dap init
Debug: 254 27 arm_dap.c:106 dap_init_all(): Initializing all DAPs ...
Debug: 255 27 openocd.c:158 handle_init_command(): Examining targets...
Debug: 256 27 target.c:1650 target_call_event_callbacks(): target event 19 (examine-start) for core riscv.cpu
Debug: 257 27 riscv.c:1111 riscv_examine(): riscv_examine()
Debug: 258 28 riscv.c:401 dtmcontrol_scan(): DTMCONTROL: 0x0 -> 0x71
Debug: 259 28 riscv.c:1121 riscv_examine(): dtmcontrol=0x71
Debug: 260 28 riscv.c:1123 riscv_examine(): version=0x1
Debug: 261 28 riscv-013.c:2243 init_target(): init
Debug: 262 29 riscv-013.c:458 dtmcontrol_scan(): DTMCS: 0x0 -> 0x71
Debug: 263 29 riscv-013.c:1575 examine(): dtmcontrol=0x71
Debug: 264 29 riscv-013.c:1576 examine(): dmireset=0
Debug: 265 29 riscv-013.c:1577 examine(): idle=0
Debug: 266 29 riscv-013.c:1578 examine(): dmistat=0
Debug: 267 29 riscv-013.c:1579 examine(): abits=7
Debug: 268 29 riscv-013.c:1580 examine(): version=1
Debug: 269 29 riscv-013.c:264 get_dm(): [0] Allocating new DM
Debug: 270 30 riscv-013.c:404 scan(): 41b w 00000000 @10 -> + 00000000 @00; 0i
Debug: 271 30 riscv-013.c:404 scan(): 41b - 00000000 @10 -> + 00000000 @00; 0i
Debug: 272 31 riscv-013.c:404 scan(): 41b w 00000001 @10 -> + 00000000 @00; 0i
Debug: 273 31 riscv-013.c:414 scan(): dmactive ->
Debug: 274 32 riscv-013.c:404 scan(): 41b - 00000000 @10 -> + 00000000 @00; 0i
Debug: 275 33 riscv-013.c:404 scan(): 41b w 07ffffc1 @10 -> + 00000000 @00; 0i
Debug: 276 33 riscv-013.c:414 scan(): hasel hartselhi=1023 hartsello=1023 dmactive ->
Debug: 277 34 riscv-013.c:404 scan(): 41b - 00000000 @10 -> + 00000000 @00; 0i
Debug: 278 34 riscv-013.c:404 scan(): 41b r 00000000 @10 -> + 00000000 @00; 0i
Debug: 279 35 riscv-013.c:404 scan(): 41b - 00000000 @10 -> + 00000000 @00; 0i
Error: 280 35 riscv-013.c:1615 examine(): Debug Module did not become active. dmcontrol=0x0
Debug: 281 35 target.c:1650 target_call_event_callbacks(): target event 20 (examine-fail) for core riscv.cpu
Debug: 282 35 openocd.c:160 handle_init_command(): target examination failed
Debug: 283 35 command.c:146 script_debug(): command - flash init
Debug: 285 35 tcl.c:1325 handle_flash_init_command(): Initializing flash devices...
Debug: 286 35 command.c:146 script_debug(): command - nand init
Debug: 288 35 tcl.c:498 handle_nand_init_command(): Initializing NAND devices...
Debug: 289 35 command.c:146 script_debug(): command - pld init
Debug: 291 35 pld.c:206 handle_pld_init_command(): Initializing PLDs...
Info : 292 35 gdb_server.c:3609 gdb_target_start(): starting gdb server for riscv.cpu on 3333
Info : 293 35 server.c:311 add_service(): Listening on port 3333 for gdb connections
Debug: 294 35 command.c:146 script_debug(): command - halt
Debug: 296 35 target.c:3109 handle_halt_command(): -
Error: 297 35 target.c:581 target_halt(): Target not examined yet
Debug: 298 35 command.c:626 run_command(): Command 'halt' failed with error code -4
User : 299 36 command.c:692 command_run_line():
Debug: 300 36 riscv.c:486 riscv_deinit_target(): riscv_deinit_target()
Debug: 301 36 riscv-013.c:1533 deinit_target(): riscv_deinit_target()
Debug: 302 36 target.c:2004 target_free_all_working_areas_restore(): freeing all working areas
Do you fix it now?