edrichv

South Africa

Pinned Repositories

blif2bench
A .blif to .bench converter
Language:C++00
Die2Sim
Die2Sim is a tool used to aid simulations of large scale superconducting circuits. The main usage of the tool is to create JoSIM files from LEF/DEF files using an existing cell library.
Language:C++0 0 00
myapp
Language:Dart00
pygentb
Language:Python0 1 00
skripsie_2020
Language:C++00
tax-calculator
Language:Go00
viper-project
Language:Verilog0 1 00
chipSmith
Generate a complete GDS chip from LEF/DEF files.
Language:C++0 1 00
Die2Sim
Die2Sim is a tool used to aid simulations of large scale superconducting circuits. The main usage of the tool is to create JoSIM files from LEF/DEF files using an existing cell library.
Language:C++6 1 03
ViPeR
Verilog to Placement and Routing
Language:C++2 1 11

edrichv's Repositories

edrichv/blif2bench
A .blif to .bench converter
Language:C++00
edrichv/Die2Sim
Die2Sim is a tool used to aid simulations of large scale superconducting circuits. The main usage of the tool is to create JoSIM files from LEF/DEF files using an existing cell library.
Language:C++0 0 00
edrichv/myapp
Language:Dart00
edrichv/pygentb
Language:Python0 1 00
edrichv/skripsie_2020
Language:C++00
edrichv/tax-calculator
Language:Go00
edrichv/viper-project
Language:Verilog0 1 00