/InterChip_Bridge

A Fault Tolerant Globally-Asynchronous-Locally-Synchronous Inter-Chip Communication Bridge on FPGAs

Primary LanguageVHDLMIT LicenseMIT

InterChip Bridge

This repository hosts the developed code that implements the proposed InterChip Communication Bridge presented in:

E.Kyriakakis, K. Ngo and J.Öberg, "Implementation of a Fault-Tolerant, Globally-Asynchronous-Locally-Synchronous, Inter-Chip NoC Communication Bridge on FPGAs", In proceeedings of NORCAS-2017, Linköping, Sweden.

Structure

  • bridge_src: is the main VHDL codebase for the developed interchip bridge component
  • other_src: is a VHDL codebase for any other developed components used in the demo projects