gagachang's Stars
lvgl/lvgl
Embedded graphics library to create beautiful UIs for any MCU, MPU and display type.
cyrus-and/gdb-dashboard
Modular visual interface for GDB in Python
kokke/tiny-AES-c
Small portable AES128/192/256 in C
riscv-collab/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
klange/nyancat
Nyancat in your terminal, rendered through ANSI escape sequences. This is the source for the Debian package `nyancat`.
cpputest/cpputest
CppUTest unit testing and mocking framework for C/C++
tidwall/neco
Concurrency library for C (coroutines)
serge1/ELFIO
ELFIO - ELF (Executable and Linkable Format) reader and producer implemented as a header only C++ library
stefanberger/swtpm
Libtpms-based TPM emulator with socket, character device, and Linux CUSE interface.
riscv/riscv-debug-spec
Working Draft of the RISC-V Debug Specification Standard
riscv/sail-riscv
Sail RISC-V model
riscv-non-isa/riscv-sbi-doc
Documentation for the RISC-V Supervisor Binary Interface
QQxiaoming/quard_star_tutorial
This project aims to build an Embedded Linux System, in order to analyze the chip from the power-on execution of the first instruction to the entire system running, based on qemu simulator development board. 本项目旨在真正从0开始构建嵌入式linux系统,为了剖析芯片从上电开始执行第一条指令到整个系统运行,基于qemu定制模拟器开发板。
riscv/riscv-fast-interrupt
Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
Lingrui98/RISC-V-book
A translation project of the RISC-V reader
michaeljclark/riscv-probe
Simple machine mode program to probe RISC-V control and status registers
OP-TEE/build
Makefiles to use OP-TEE on various platforms
riscv/riscv-profiles
RISC-V Architecture Profiles
riscv/riscv-cfi
This repo holds the work area and revisions of the RISC-V CFI (Shadow Stack and Landing Pads) specifications. CFI defines the privileged and unprivileged ISA extensions that can be used by privileged and unprivileged programs to protect the integrity of their control-flow.
tidwall/llco
A low-level coroutine library for C
0xMirasio/qemu-patch-raspberry4
patch QEMU for raspberry4
riscv-non-isa/riscv-ap-tee
This repo holds the work area and revisions of the non-ISA specification created by the RISC-V AP-TEE TG. This specification defines the programming interfaces (ABI) to support the Confidential VM Extension (CoVE) confidential computing architecture for RISC-V application-processor platforms.
cnrv/RVSC2023
RISC-V Summit China 2023
riscv/riscv-smmtt
This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant security use cases e.g. confidential-computing, trusted platform services, fault isolation and so on.
IBM/ACE-RISCV
Assured confidential execution (ACE) implements VM-based trusted execution environment (TEE) for RISC-V with focus on a formally verified and auditable security monitor.
riscv-admin/security
RISC-V Security HC admin repo
andestech/meta-andes
Andes OpenEmbedded (OE) BSP Layer
Linaro/freertos-pkcs11-psa
FreeRTOS PSA PKCS11
riscv-non-isa/riscv-rvm-csi
RVM-CSI (RISC-V eMbedded - Common Software Interface) aims to provide a source-level portability layer providing a simplified transition path between different microcontrollers based on RISC-V. This repo contains the specification documentation, and language-specific source files for implementing the API (initially, C header files).
grg-haas/smmtt