glblazer

glblazer's Stars

• isakedo/DNNsim

  Language:C++2712

• zhaoweicai/EdMIPS

  PyTorch implementation of EdMIPS: https://arxiv.org/pdf/2004.05795.pdf

  Language:Python5712

• HirokiNakahara/FPGA_lecture

  Source Codes for a lecture entitled "Parallel and Reconfigurable VLSI Computing" in Tokyo Tech.

  Language:C++269

• ARM-software/SCALE-Sim

  Language:Python331151

• fastmachinelearning/hls4ml

  Machine learning on FPGAs using HLS

  Language:C++1.2k399

• NVlabs/timeloop

  Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.

  Language:C++321101

• HewlettPackard/cacti

  An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model

  Language:C++389131

• harvard-acc/ALADDIN

  A pre-RTL, power-performance model for fixed-function accelerators

  Language:C++16555

• jiangwx/SkrSkr

  The second place winner for DAC-SDC 2020

  Language:Tcl9626

• omarawad2/SCNN_GPU2

  Implementation of a sparse CNN inference accelerator with compressed activation and weight memory using CUDA. Code optimized for GTX 980 card.

  Language:C++3

• ranery/BitFusion-Tutorial

  How to use the open-source BitFusion (https://github.com/hsharma35/bitfusion)

  Language:Jupyter Notebook51

• IBM/AccDNN

  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

  Language:Verilog388101

• cea-wind/SimpleTPU

  A FPGA Based CNN accelerator, following Google's TPU V1.

  Language:C++11638

• maeri-project/MAERI_bsv

  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)

  Language:Bluespec5613

• B-Lang-org/bsc

  Bluespec Compiler (BSC)

  Language:Haskell930142

• m-labs/migen

  A Python toolbox for building complex digital hardware

  Language:Python1.2k209