google/globalfoundries-pdk-libs-gf180mcu_fd_pr

Layer map confusion regarding GF180 MCU top layer and metal 5 mapping.

Closed this issue · 3 comments

Layer Mapping of 5th metal for IO and other devices to Top metal or Metal 5 is not clear for DC implementation and other items.

Steps to Reproduce the Problem

Multiple sources of documentation:
Based on GF tapeout configuration document (attached), the BEOL mask layer numbers are:
80 --> Metal1
85 --> Via1
88 --> Metal2
91 --> Via2
93 --> Metal3
94 --> Via3
96 --> Metal4
97 --> Via4
98 --> Metaltop

The mapping was done using the following table 4.3 from the DRM:
image

On the other hand, the DRM states the following:
image

We are not sure of which GDS number to use for Metal5 either:
53 (MetalTop Mask Layer)
81 (M5 Mask Layer)
Could you please clarify?

Specifications

GF response:

Begin Quote:
For designs taping into GF, if they are using the five metal layer process. The last metal layer is Metal5 and needs to use gdsii# 81:0 for the incoming tapeout database to GF. And the metal5 needs to follow MetalTop design rules

This post was added to Github with GF permission.

@atorkmabrains This issue has been addressed in PV repo

@azwefabless We have discussed that with GF and the layer numbering matches the DESIGN ACTIVITIES table. Meaning the layer numbering stay the same.

cc @mkkassem @RTimothyEdwards @mithro