google/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0

Issues

• liberty issues with yosys

  #21 opened 2 years ago by kareefardi
  0

• Missing SITE definition

  #16 opened 2 years ago by kareefardi
  1

• Miss-match in metal layer names between cells lef and tech lef

  #14 opened 2 years ago by kareefardi
  0

• CI should check that the standard cells pass the GF180MCU DRC rules

  #2 opened 2 years ago by mithro
  1

• Add missing definition.json files for each standard cell

  #3 opened 2 years ago by mithro
  0

• Get the foss-eda-tools.googlesource.com mirror happening

  #1 opened 2 years ago by mithro
  1

• Repository should have a tech directory like the gf180mcu_fd_sc_mcu7t5v0 library

  #4 opened 2 years ago by mithro
  0

• Add verilog test benches for each of the standard cells.

  #5 opened 2 years ago by mithro
  0