grigoriy-chirkov

Princeton UniversityPrinceton

Pinned Repositories

Analog-level-meter-AVR
This is a little project on microcontroller, performed by MIPT students.
Language:Assembly1 2 00
course22
The fast.ai course notebooks
Language:Jupyter Notebook00
gem5-aladdin
End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
Language:C++00
inet
INET Framework for the OMNeT++ discrete event simulator
Language:C++00
mipt-mips-2015
Functional and performance simulators for MIPS-based microprocessor
Language:Assembly00
omnetpp
OMNeT++ Discrete Event Simulator
Language:C0 1 00
openpiton
The OpenPiton Platform
Language:Assembly0 2 00
primesim
A parallel and distributed simulator for thousand-core chips
Language:C++0 3 00
smappic
Language:Assembly10
openpiton
The OpenPiton Platform
Language:Assembly612 57 63212

grigoriy-chirkov/Analog-level-meter-AVR
This is a little project on microcontroller, performed by MIPT students.
Language:Assembly1 2 00
grigoriy-chirkov/smappic
Language:Assembly10
grigoriy-chirkov/course22
The fast.ai course notebooks
Language:Jupyter Notebook00
grigoriy-chirkov/gem5-aladdin
End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
Language:C++00
grigoriy-chirkov/inet
INET Framework for the OMNeT++ discrete event simulator
Language:C++00
grigoriy-chirkov/mipt-mips-2015
Functional and performance simulators for MIPS-based microprocessor
Language:Assembly00
grigoriy-chirkov/omnetpp
OMNeT++ Discrete Event Simulator
Language:C0 1 00
grigoriy-chirkov/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
Language:Verilog00
grigoriy-chirkov/openpiton
The OpenPiton Platform
Language:Assembly0 2 00
grigoriy-chirkov/primesim
A parallel and distributed simulator for thousand-core chips
Language:C++0 3 00
grigoriy-chirkov/oversim
Language:C++