Pinned Repositories
hVHDL
documentation pages for High Level Synthesizable VHDL (hVHDL) libraries
hVHDL_analog_to_digital_drivers
Analog to digital drivers for Sigma Delta Modulators with high level interfaces
hVHDL_dynamic_model_verification_library
Synthesizable VHDL models for HiL Simulation
hVHDL_example_project
An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has build scripts for most common FPGAs
hVHDL_fixed_point
VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms.
hVHDL_floating_point
high level VHDL floating point library for synthesis in fpga
hVHDL_fpga_interconnect
interconnecting bus written in VHDL for accessing data in FPGA modules
hVHDL_gigabit_ethernet
VHDL library for synthesizable minimal gigabit ethernet with RGMII interface, minimal ethernet, ip and udp header parsers.
hVHDL_memory_library
Memory library written in VHDL for synthesis
hVHDL_microprogam_processor
VHDL module for running operations from memory with the software also written in vhdl
hVHDL's Repositories
hVHDL/hVHDL_example_project
An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has build scripts for most common FPGAs
hVHDL/hVHDL_fixed_point
VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms.
hVHDL/hVHDL_floating_point
high level VHDL floating point library for synthesis in fpga
hVHDL/hVHDL_gigabit_ethernet
VHDL library for synthesizable minimal gigabit ethernet with RGMII interface, minimal ethernet, ip and udp header parsers.
hVHDL/hVHDL
documentation pages for High Level Synthesizable VHDL (hVHDL) libraries
hVHDL/hVHDL_dynamic_model_verification_library
Synthesizable VHDL models for HiL Simulation
hVHDL/hVHDL_memory_library
Memory library written in VHDL for synthesis
hVHDL/hVHDL_microprogam_processor
VHDL module for running operations from memory with the software also written in vhdl
hVHDL/hVHDL_fpga_interconnect
interconnecting bus written in VHDL for accessing data in FPGA modules
hVHDL/hVHDL_analog_to_digital_drivers
Analog to digital drivers for Sigma Delta Modulators with high level interfaces
hVHDL/hVHDL_uart
VHDL library for uart with abstracted interface for easy application.
hVHDL/.github