haozhango

haozhango's Stars

• FFmpeg/FFmpeg

  Mirror of https://git.ffmpeg.org/ffmpeg.git

  Language:C45.8k1.4k012.1k

• wavedrom/wavedrom

  :ocean: Digital timing diagram rendering engine

  Language:JavaScript3k90340365

• Xilinx/embeddedsw

  Xilinx Embedded Software (embeddedsw) Development

  Language:HTML9451112321.1k

• VUnit/vunit

  VUnit is a unit testing framework for VHDL/SystemVerilog

  Language:VHDL73551614263

• kaitoukito/Computer-Science-Textbooks

  Collect some CS textbooks for learning.

  588110165

• funningboy/uvm_axi

  uvm AXI BFM(bus functional model)

  Language:Verilog233204112

• ericsonj/verilog-format

  Verilog formatter

  Language:Java17543131

• kaitoukito/A-Primer-on-Memory-Consistency-and-Cache-Coherence

  A Primer on Memory Consistency and Cache Coherence (Second Edition) 翻译计划

  1733236

• CustomizableComputingLab/CustomizableComputingLab.github.io

  Language:HTML1364030

• risclite/ARM9-compatible-soft-CPU-core

  This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your FPGA design as one submodule, if you master the interface of this .v file. This IP core is very compact. It is one .v file and has only less 1800 lines.

  Language:Verilog745332

• FFmpeg/gas-preprocessor

  Perl script that implements a subset of the GNU as preprocessor that Apple's as doesn't

  Language:Perl728034