hodjat91

Silicon Engineer @Google Computer Science PhD from @UCRiverside

GoogleSunnyvale, CA

Pinned Repositories

riscv-dv
Random instruction generator for RISC-V processor verification
Language:Python1k 82 351332
ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Language:SystemVerilog0 0 00
pyvsc
Python packages providing a library for Verification Stimulus and Coverage
Language:Python0 0 00
riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
Language:SystemVerilog0 0 00
rodinia
rodinia benchmark modified to run with ENZO and pathcu instead of nvcc CUDA compiler
Language:C00
vim-config
my vim config to share amongst my machines
Language:Vim Script00
ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Language:SystemVerilog1.4k 99 838554

hodjat91's Repositories

hodjat91/ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Language:SystemVerilog0 0 00
hodjat91/pyvsc
Python packages providing a library for Verification Stimulus and Coverage
Language:Python0 0 00
hodjat91/riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
Language:SystemVerilog0 0 00
hodjat91/rodinia
rodinia benchmark modified to run with ENZO and pathcu instead of nvcc CUDA compiler
Language:C00
hodjat91/vim-config
my vim config to share amongst my machines
Language:Vim Script00