Pinned Repositories
912_project
(ノ≧∇≦)ノ
c-151-
项目描述
cpu
MIPS CPU
doc_rCoreOnLabeledRisc-v
finance
Calculate the efficient frontier
hongshen424.github.io
个人主页
labeled-RISC-V
learngit
mips-processor
A dual-issue superscalar pipelined MIPS architecture which includes a cache, a branch-target buffer and a multiplication coprocessor. Completed in ECE154B in Spring 2016 with my partner Tristan Seroff.
single_cpu_design
hongshen424's Repositories
hongshen424/single_cpu_design
hongshen424/mips-processor
A dual-issue superscalar pipelined MIPS architecture which includes a cache, a branch-target buffer and a multiplication coprocessor. Completed in ECE154B in Spring 2016 with my partner Tristan Seroff.
hongshen424/912_project
(ノ≧∇≦)ノ
hongshen424/c-151-
项目描述
hongshen424/cpu
MIPS CPU
hongshen424/doc_rCoreOnLabeledRisc-v
hongshen424/finance
Calculate the efficient frontier
hongshen424/hongshen424.github.io
个人主页
hongshen424/labeled-RISC-V
hongshen424/learngit
hongshen424/LessonPythonCode
LessonPythonCode
hongshen424/summary
hongshen424/time-as-a-friend
《把时间当作朋友》
hongshen424/ucore_os_lab
os kernel labs for operating systems course in Tsinghua University.