Pinned Repositories
BART-System-Verification
This repository contains the BART (Bay Area Rapid Transit) system model and Implementation code for ARM CortexM series. Formal models are presented in AutoFocus3(AF3) format in which you can verify the properties using NuSMV model checker.
BARVINN
BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
chisel-tutorial-wiki
chisel tutorial wiki (modified)
cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux. Refer to https://github.com/openhwgroup/cva6
FRDM-KL25Z-SPI-Driver
FRDM KL25Z SPI Driver
FunctionalProgramming
My solutions for Functional Programming with Scala course offered in Coursera
int8_experiments
Int8 quantization in Openvino
pito_riscv
A Barrel design of RV32I
U-Net-Fixed-Point-Quantization-for-Medical-Image-Segmentation
Repository containing code for "U-Net Fixed-Point Quantization for Medical Image Segmentation" paper at MICCAI2019
ZYBO
This repository contains my Linux builds and projects for ZYBO Zynq dev board
hossein1387's Repositories
hossein1387/U-Net-Fixed-Point-Quantization-for-Medical-Image-Segmentation
Repository containing code for "U-Net Fixed-Point Quantization for Medical Image Segmentation" paper at MICCAI2019
hossein1387/BARVINN
BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
hossein1387/pito_riscv
A Barrel design of RV32I
hossein1387/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux. Refer to https://github.com/openhwgroup/cva6
hossein1387/awesome-semiconductor-startups
List of awesome semiconductor startups
hossein1387/common_cells
Common SystemVerilog components
hossein1387/MLExperiments
My experiments with ML tools
hossein1387/MVU
Neural Network accelerator powered by MVUs and RISC-V.
hossein1387/MVU_Codegen
hossein1387/nn_from_scratch
hossein1387/al-folio
A beautiful, simple, clean, and responsive Jekyll theme for academics
hossein1387/APoT_Quantization
PyTorch implementation for the APoT quantization (ICLR 2020)
hossein1387/ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 0.9, working as a coprocessor to CORE-V's CVA6 core
hossein1387/fusesoc
Package manager and build abstraction tool for FPGA/ASIC development
hossein1387/fusesoc-cores
FuseSoC standard core library
hossein1387/GOL
hossein1387/hossein1387.github.io
Personal Website
hossein1387/IFT6135
Assignments and Project for IFT6135 REPRESENTATION LEARNING (Universite De Montreal)
hossein1387/IntegerLenet
hossein1387/miraliahmadli
hossein1387/mojo
The Mojo Programming Language
hossein1387/onnx-surgery
hossein1387/openpiton
The OpenPiton Platform
hossein1387/random_hw_experiments
hossein1387/ReCU
Pytorch implementation of our paper accepted by ICCV 2021 -- ReCU: Reviving the Dead Weights in Binary Neural Networks http://arxiv.org/abs/2103.12369
hossein1387/ssd.pytorch
A PyTorch Implementation of Single Shot MultiBox Detector
hossein1387/TestSV
hossein1387/tinytapeout-verilog-test
Simple project to test Tinytapeout
hossein1387/twitchcore
It's a core. Made on Twitch.
hossein1387/wokwi-verilog-gds-test