Integrated Circuits Lab @ DUTH
Research Lab focusing on the design and verification of Digital Integrated Circuits at ECE department of DUTH
Xanthi, Greece
Pinned Repositories
ApproximatePrefix
Synthesis of Approximate Parallel Prefix Adders
Data-Clustering-HLS-Lib
A C++ library of data clustering algorithms for High-Level Synthesis
DRIM
DUTH RISC-V Microprocessor
DRIM-S
DUTH RISC-V Superscalar Microprocessor
DRIM4HLS
DUTH RISC V Microprocessor for High Level Synthesis
Fast-Float4HLS
Fast Floating Point Operators for High Level Synthesis
FusedGCN4HLS
Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
NoCpad
HLS for Networks-on-Chip
RISC-V-Vector
Vector processor for RISC-V vector ISA
shared-buffer-hw
A multi-queue buffer with dynamic buffer space allocation and its Formal Verification TB
Integrated Circuits Lab @ DUTH's Repositories
ic-lab-duth/RISC-V-Vector
Vector processor for RISC-V vector ISA
ic-lab-duth/DRIM-S
DUTH RISC-V Superscalar Microprocessor
ic-lab-duth/NoCpad
HLS for Networks-on-Chip
ic-lab-duth/FusedGCN4HLS
Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
ic-lab-duth/DRIM
DUTH RISC-V Microprocessor
ic-lab-duth/Fast-Float4HLS
Fast Floating Point Operators for High Level Synthesis
ic-lab-duth/DRIM4HLS
DUTH RISC V Microprocessor for High Level Synthesis
ic-lab-duth/shared-buffer-hw
A multi-queue buffer with dynamic buffer space allocation and its Formal Verification TB
ic-lab-duth/Data-Clustering-HLS-Lib
A C++ library of data clustering algorithms for High-Level Synthesis
ic-lab-duth/MLMB4HLS
ic-lab-duth/ApproximatePrefix
Synthesis of Approximate Parallel Prefix Adders
ic-lab-duth/CompArchCourseDUTH
Material related to the Computer Architecture course at ECE, DUTH
ic-lab-duth/SIMD-Softmax