ihhazmi
Engineering Educator, PhD in ECE (UVic, Canada 2018), Digital Logic and FPGA Developer.
Victoria BC
ihhazmi's Stars
open-logic/open-logic
Open Logic HDL Standard Library
eimtechnology/STEPFPGA-MXO2Core
The codes accompanied with STEPFPGA tutorial book
ihhazmi/STEPFPGA-MXO2Core
The codes accompanied with STEPFPGA tutorial book
dkilfoyle/logic2
Digital Logic Simulator
sebsikora/cpp_logic_simulation
A simple digital logic simulator written as a learning exercise in C++
tilk/digitaljs
Teaching-focused digital circuit simulator
drendog/Logic-Circuit-Simulator
A logic circuit simulator made with p5.js library.
DigitalLogicSimCommunity/Digital-Logic-Sim-CE
Community Edition of SebLague 's Digital Logic Sim
logisim-evolution/logisim-evolution
Digital logic design tool and simulator
SebLague/Digital-Logic-Sim
matijakevic/mcircuit
A digital logic simulator inspired by Logisim.
hneemann/Digital
A digital logic designer and circuit simulator.
jpralves/cseduino
Build your Arduino from scratch - projects
posquit0/hugo-awesome-identity
š¤ Awesome Identity is a single-page Hugo theme to introduce yourself.
posquit0/awesome-engineering-team-principles
:sunglasses: A curated list of awesome resources for engineering team principles
posquit0/awesome-engineering-ladders
:sunglasses: A curated list of awesome resources for Engineering Ladder
posquit0/Awesome-CV
:page_facing_up: Awesome CV is LaTeX template for your outstanding job application
ihhazmi/computer-8bits
A basic 8-bits computer created with LogiSim digital circuit simulator :computer:
dawsonjon/fpu
synthesiseable ieee 754 floating point library in verilog
jhhoward/Faux86
A portable, open-source 8086 PC emulator for bare metal Raspberry Pi
OSVVM/VerificationIP
Deprecated - This library has been replaced by OsvvmLibraries. The links to the submodules will not be updated to the new versions.
dpretet/async_fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
ZipCPU/vgasim
A Video display simulator
VLSI-EDA/PoC
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische UniversitƤt Dresden, Germany