jerry-D/SYMPL-GP-GPU-Compute-Engines

Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in open-source Verilog RTL for 32-bit single-precision floating-point accelerated applications.

(January 2, 2019) All design files and documentation have been temporarily removed while the design is being updated. When complete, they will be re-published here or in a different repository.