jge162
Together, let’s innovate and create a better tomorrow through code!
Raytheon Missiles and DefenseFullerton, ca
jge162's Stars
public-apis/public-apis
A collective list of free APIs
github/gitignore
A collection of useful .gitignore templates
cyring/CoreFreq
CoreFreq : CPU monitoring and tuning software designed for 64-bit processors.
Devsh-Graphics-Programming/Nabla
Vulkan, OptiX and CUDA Interoperation Modular Rendering Library and Framework for PC/Linux/Android
check-spelling/check-spelling
Spelling checker action to check spelling in repositories / pull requests / commits
nixypanda/dotfiles
My dotfiles + system configuration for NixOS and mac
getodk/central
ODK Central is a server that is easy to use, very fast, and stuffed with features that make data collection easier. Contribute and make the world a better place! ✨🗄✨
alialaa/github-actions-course
codingWithElias/php-to-do-list
PHP (PDO), MYSQL and JQuery AJAX Full Project from Scratch.
EthanThatOneKid/acmcsuf.com
🐘 Official website of CSUF's ACM chapter
chaoocharles/react-email.js
jge162/verilog_compiler
Verilog_Compiler is now available in GitHub Marketplace! This tool can quickly compile Verilog code and check for errors, making it an essential tool for developers.
daringcalf/canvas-schedule-helper
Simple python scripts that calculates each module's duration.
jge162/471-SeniorDesign
Team of four CSUF seniors creating an innovative 'Automatic Waste Sorter' that utilizes advanced technology to sort waste accurately and efficiently. The system's core is driven by a Google Coral Dev Board, with additional peripherals such as an Arduino, stepper motors, proximity sensors, a webcam, and object detection (machine learning).
acmcsufoss/acmOpportunities
Sends AI-curated digests to our club Discord server.
br4chu/johann
Johann is a simple Java library that talks to docker-compose CLI
jge162/Embedded-Projects
Embedded C projects completed while in attendance at CSUF, ADC, DAC, Matlab filter and FSM traffic light.
jge162/Verilog_VHDL_Projects
Projects completed in Verilog while in attendance at CSUF
jge162/jge162
jge162/Python-Scripts
jge162/ScoreBoardW-Timer
Objective of this project was to emulate a Basketball score board, with timer and two teams scores. See readme for pic and more details. FPGA design with Vivado
jge162/Seven-Segement
egomez3412/FoodKeeperResearch
jge162/CSUF-ASU-Courses
andmedina/aptafind
eduzamorano/eduzamorano.github.io
Geo4u/python
practice coding examples
DSCKGEC/project-template
A basic GitHub repository template for initializing open source projects on a single click. Automated contributing, code of conduct, issue and pull request and readme template.
duy301199/-Pipelining-the-Small16-Processor-
duy301199/University-Database-System