jtplaarj's Stars
Canop/broot
A new way to see and navigate directory trees : https://dystroy.org/broot
akavel/up
Ultimate Plumber is a tool for writing Linux pipes with instant live preview
tstack/lnav
Log file navigator
VUnit/tdd-intro
Example of Test Driven Design with VUnit
charmbracelet/gum
A tool for glamorous shell scripts š
kadomoto/picture-to-gds
Python script to convert image files to GDSII files
astral-sh/uv
An extremely fast Python package and project manager, written in Rust.
toolleeo/awesome-cli-apps-in-a-csv
The largest Awesome Curated list of command line programs (CLI/TUI) with source data organized into CSV files
YS-L/csvlens
Command line csv viewer
tmeissner/psl_with_ghdl
Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
YosysHQ-GmbH/SVA-AXI4-FVIP
YosysHQ SVA AXI Properties
dh73/A_Formal_Tale_Chapter_I_AMBA
AXI Formal Verification IP
nicsure/QuanshengDock
Allows the Quansheng UV-K5 radio to be controlled by a PC.
kucherenko/jscpd
Copy/paste detector for programming source code.
ultraembedded/core_dbg_bridge
UART -> AXI Bridge
TinyTapeout/tt06-verilog-template
Submission template for Tiny Tapeout 6 - Verilog HDL Projects
luigifcruz/CyberEther
Multi-platform GPU-accelerated interface for compute-intensive pipelines. Radio, the final frontier.
efabless/EF_PSRAM_CTRL
A Quad I/O SPI Pseudo Static RAM (PSRAM) Controller
pellepl/spiffs
Wear-leveled SPI flash file system for embedded devices
tpoikela/uvm-python
UVM 1.2 port to Python
k88hudson/git-flight-rules
Flight rules for git
adrianlarion/useful-sed
Useful sed scripts & patterns.
esynr3z/corsair
Control and Status Register map generator for HDL projects
ZipCPU/wb2axip
Bus bridges and other odds and ends
jedrzejboczar/elf-size-analyze
Script for analyzing ELF memory usage
QuantumLeaps/qpc
QP/C Real-Time Embedded Framework/RTOS is a lightweight implementation of the Active Object (Actor) model of computation for real-time embedded systems.
d3blocks/d3blocks
The Python library to create stand-alone and interactive d3Ā charts.
The-OpenROAD-Project/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
derkork/openscad-graph-editor
OpenSCAD Graph Editor
shellspec/shellspec
A full-featured BDD unit testing framework for bash, ksh, zsh, dash and all POSIX shells