kayak4665664/NCUT_MiniSys
A simple MIPS five-stage pipeline CPU implements 31 MIPS instructions.一个简单的MIPS五级流水CPU,实现了31条指令。
VerilogGPL-3.0
No issues in this repository yet.
A simple MIPS five-stage pipeline CPU implements 31 MIPS instructions.一个简单的MIPS五级流水CPU,实现了31条指令。
VerilogGPL-3.0
No issues in this repository yet.