kinap/AES-Processor

Issues

• Add additional background information to the final paper

  #34 opened 8 years ago by pear7
  2

• Add assertion negative testing

  #35 opened 8 years ago by pear7
  2

• Refactor key expansion module to include buffering

  #11 opened 8 years ago by pear7
  8

• Reduce amount of round key data buffered

  #12 opened 8 years ago by pear7
  1

• Create non-veloce testbench for AESEncoder and AESDecoder modules

  #6 opened 8 years ago by SLawson
  4

• Improve Round Key pipelining

  #13 opened 8 years ago by pear7
  1

• Implement code coverage

  #19 opened 8 years ago by kinap
  4

• Investigate other ways to transfer data to the emulator

  #32 opened 8 years ago by pear7
  2

• Add additional assertions

  #33 opened 8 years ago by pear7
  1

• Modify seeded testing to use encrypted data

  #31 opened 8 years ago by pear7
  1

• Update block diagrams

  #29 opened 8 years ago by kinap
  3

• Compile time selection to infer RAM or not for LUTs

  #30 opened 8 years ago by kinap
  1

• Implement reset propagation and associated output valid signal

  #1 opened 9 years ago by kinap
  1

• Integrate AESGen into Makefile

  #2 opened 9 years ago by kinap
  1

• Transactor doesn't properly send valid signals back to hvl

  #7 opened 9 years ago by kinap
  1

• Investigate proper way to push GF/SBOX LUTs into Veloce RAM

  #5 opened 9 years ago by kinap
  2

• AESGen not able to compile without manual libtomcrypt clone

  #4 opened 9 years ago by kinap
  3

• Integrate argparse into AESGen

  #3 opened 9 years ago by kinap
  1

• Modify make file to only run top level testbench once

  #28 opened 8 years ago by pear7
  1

• ExpandKey test bench produces a stack trace

  #27 opened 8 years ago by kinap
  3

• Create decoder->encoder in Transactor to utilize other data in the test vector

  #25 opened 8 years ago by pear7
  1

• Modify Transactor to test all 3 AES version in parallel

  #20 opened 8 years ago by pear7
  2

• Change generated vector format

  #26 opened 8 years ago by kinap
  4

• Change encoder and decoder to be controlled by instantiation parameter

  #14 opened 8 years ago by pear7
  4

• Update HVL testbench to do directed and then seeded testing

  #24 opened 8 years ago by pear7
  3

• Add capability to top level testbench for "seeded tests"

  #23 opened 8 years ago by pear7
  4

• Enable Questa Simultion Profiling

  #22 opened 8 years ago by pear7
  1

• Investigate additional SCEMI Pipes options

  #17 opened 8 years ago by pear7
  1

• Change transactor to use assertions

  #15 opened 8 years ago by pear7
  1

• Create Need For Speed Proposal

  #18 opened 9 years ago by pear7
  7

• Investigate "0-in" setup for emulation assertion usage

  #16 opened 9 years ago by pear7
  1

• Remove extra comments in EncoderDecoderTestBench.sv

  #10 opened 9 years ago by pear7
  1

• Cleanup function/task inputs in the Test Classes to use the typedefs

  #9 opened 9 years ago by pear7
  2

• Improve usage of valid bit propogation through modules

  #21 opened 9 years ago by SLawson
  3

• Add !$isunknown assertions to all module inputs

  #8 opened 9 years ago by SLawson
  9