laurentc2/Verilog2Spice
Simple strutured VERILOG netlist to SPICE netlist translator
PythonBSD-2-Clause
Stargazers
- andylithiaUMich, Michigan
- b224hislTsinghua University
- cadnav
- carlosdelfino@ArvoreDosSaberes
- ealwanleeGCT Semiconductor, Inc
- Eddieghoul
- elnikioBulgaria
- GabriellJacinto
- jackhong12Taipei, Taiwan
- JackLinkin
- laurentc2
- Monkasa
- OuDret
- rog77
- snhobbsElectroOptical Innovations
- SONG19940218
- YanBin-JhangTaiwan
- ysy597610459
- yyh-sjtuShanghai, China
- ZhaoHaowenn