lomano77's Stars
bitwarden/android
Bitwarden mobile app for Android.
steveicarus/iverilog
Icarus Verilog
nigels-com/glew
The OpenGL Extension Wrangler Library
airbus-seclab/qemu_blog
A series of posts about QEMU internals:
VerticalResearchGroup/miaow
An open source GPU based off of the AMD Southern Islands ISA.
leecher1337/ntvdmx64
Run Microsoft Windows NTVDM (DOS) on 64bit Editions
p7zip-project/p7zip
A new p7zip fork with additional codecs and improvements (forked from https://sourceforge.net/projects/sevenzip/ AND https://sourceforge.net/projects/p7zip/).
umanovskis/baremetal-arm
An ebook about bare-metal programming for ARM
ARM-software/CMSIS_4
Cortex Microcontroller Software Interface Standard (V4 no longer maintained)
adki/AMBA_AXI_AHB_APB
AMBA bus lecture material
Xilinx/qemu
Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms.
davidepatti/noxim
Network on Chip Simulator
tukl-msd/DRAMSys
DRAMSys a SystemC TLM-2.0 based DRAM simulator.
adki/gen_amba_2021
AMBA bus generator including AXI4, AXI3, AHB, and APB
ashwio/arm64-hypervisor-tutorial
adki/gen_amba
AMBA bus generator including AXI, AHB, and APB
snbk001/Verilog-Design-Examples
Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy machine and Moore machine, Number of 1s, Binary to Gray Conversion, Up down counter, Clock Divider, PIPO, n bit universal shift register, 4 bit LFSR, Single port RAM, Dual port RAM, Synchronous FIFO, Asynchronous FIFO, 8x8 Sequential Multiplier
zero-day-labs/riscv-iommu
IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
adki/DPI_Tutorial
SystemVerilog Direct Programming Interface (DPI) Tutorial
quic/qbox
Qbox
adki/cosim_bfm_library
HW-SW Co-Simulation Library for AMBA AXI BFM using DPI/VPI
ic-lab-duth/NoCpad
HLS for Networks-on-Chip
adki/RTL-Design-For-FPGA
Engineering Program on RTL Design for FPGA Accelerator
leds-lab/redscarf
System-on-Chip Interconnection Network - Simulation Environment (front-end)
adki/Deep_Learning_Blocks
DLB (Deep Learning Blocks) as a part of DPU (Deep Learning Processing Unit) is a collection of synthesizable Verilog modules for deep learning inference network.
AcornPublishing/tls-cryptography
TLS 구현으로 배우는 암호학 [C++로 만드는 HTTPS 서비스]
adki/network_vpi_lib
Network VPI Library is a collection of VPI (Verilog Programming Interface) tasks that handles network packets, which include Ethernet, IP, UDP, TCP and PTPv2.
adki/DLR_Projects
Deep learning projects using DLR (Deep Learning Routines)
adki/HiPi-Bus_shared_bus_protocol
The HiPi+Bus (하이파이플러스버스) is a shared bus with pipelined protocol supporting multi-cache coherency.
adki/RACE_protocol
RACE Protocol: Remote Access Cache Coherency Enforcement Protocol