Pinned Repositories
axi_ethernet_bridge
A bridge IP for interconnecting Xilinx's AXI Ethernet Subsystems (used with EthernetFMC).
axis_exec_op
Verilog module for executing logic operations over AXI4-Stream interface data.
blog
Support files for my blog posts
cocotbext-blk-mem-gen
Xilinx Block Memory Generator Model for Cocotb
lbverilog-sm
Collection of handy small modules in Verilog
net2axis
Verilog network module. Models network traffic from pcap to AXI-Stream
ngx_http_simple_example
Simple handler example module for nginx
SUME-BlinkLED
NetFPGA-SUME blinking LEDs design
uioctl
utility for debugging Linux UIO ("Userspace I/O") devices
ZCU102-Ethernet
Fork from Xilinx's repo plus designs ported to other Vivado versions.
lucasbrasilino's Repositories
lucasbrasilino/net2axis
Verilog network module. Models network traffic from pcap to AXI-Stream
lucasbrasilino/axis_exec_op
Verilog module for executing logic operations over AXI4-Stream interface data.
lucasbrasilino/ngx_http_simple_example
Simple handler example module for nginx
lucasbrasilino/axi_ethernet_bridge
A bridge IP for interconnecting Xilinx's AXI Ethernet Subsystems (used with EthernetFMC).
lucasbrasilino/cocotbext-blk-mem-gen
Xilinx Block Memory Generator Model for Cocotb
lucasbrasilino/lbverilog-sm
Collection of handy small modules in Verilog
lucasbrasilino/SUME-BlinkLED
NetFPGA-SUME blinking LEDs design
lucasbrasilino/blog
Support files for my blog posts
lucasbrasilino/uioctl
utility for debugging Linux UIO ("Userspace I/O") devices
lucasbrasilino/ZCU102-Ethernet
Fork from Xilinx's repo plus designs ported to other Vivado versions.
lucasbrasilino/cocotbext-uart
UART models for cocotb
lucasbrasilino/device-tree-xlnx
Linux device tree generator for the Xilinx SDK (Vivado > 2014.1)
lucasbrasilino/HLx_Examples
Open Source HLx Examples
lucasbrasilino/HotOM
lucasbrasilino/libcoap
A CoAP (RFC 7252) implementation in C
lucasbrasilino/packet_capture
Packet Capture pcore for NetFPGA 10G
lucasbrasilino/pox
The POX Controller
lucasbrasilino/pytorch-cifar
95.47% on CIFAR10 with PyTorch
lucasbrasilino/pyuio
Very alpha stage Python module for UIO devices
lucasbrasilino/secret_flow
NetFPGA-1G Packet Flow Cypher
lucasbrasilino/website
lucasbrasilino/wrr_switch
NetFPGA-1G WRR Input Arbiter Switch