mhgholamrezaei

mhgholamrezaei's Stars

• UVA-LavaLab/PIMeval-PIMbench

  PIMeval simulator and PIMbench suite

  Language:C++1015

• fastmachinelearning/qonnx

  QONNX: Arbitrary-Precision Quantized Neural Networks in ONNX

  Language:Python12840

• zhuhanqing/Lightening-Transformer

  [HPCA24] Lightening-Transformer: A Dynamically-operated Optically-interconnected Photonic Transformer Accelerator

  Language:Python14

• skot/bitaxe

  Open source ASIC Bitcoin miner hardware

  922144

• MattPD/cpplinks

  A categorized list of C++ resources.

  4.6k485

• tukl-msd/DRAMSys

  DRAMSys a SystemC TLM-2.0 based DRAM simulator.

  Language:C++22857

• actlab-genesys/GeneSys

  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.

  Language:Python323

• HyperdimensionalComputing/collection

  Collection of Hyperdimensional Computing Projects

  33330

• umd-memsys/DRAMsim3

  DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator

  Language:C++322145

• prakhar1989/awesome-courses

  :books: List of awesome university courses for learning Computer Science!

  57.8k8.2k

• enjoy-digital/litex

  Build your hardware, easily!

  Language:C3k573

• CMU-SAFARI/DRAM-Bender

  DRAM Bender is the first open source DRAM testing infrastructure that can be used to easily and comprehensively test state-of-the-art HBM2 chips and DDR4 modules of different form factors. Six prototypes are available on different FPGA boards. Described in our preprint: https://arxiv.org/pdf/2211.05838.pdf

  Language:VHDL5814

• KnowingNothing/compiler-and-arch

  A list of tutorials, paper, talks, and open-source projects for emerging compiler and architecture

  39735

• EECS-NTNU/bismo

  BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing

  Language:Scala13130

• VLSI-EDA/PoC

  IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

  Language:VHDL55395

• HyperDbg/HyperDbg

  State-of-the-art native debugging tools

  Language:C3k377

• joaomiguelvieira/kNN-STUFF

  K-Nearest Neighbors STreaming Unit for FPGA

  Language:VHDL46

• dgschwend/zynqnet

  Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"

  Language:HTML743297

• pulp-platform/ara

  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

  Language:C380132

• aleeamini/Flareon7-2020

  my write-ups for flareon7

  Language:Python274

• matzesc/notes

  For personal note taking using Markdown

  3

• HyperDbg/communication

  The serial communication of HyperDbg

  Language:C72

• SinaKarvandi/Hypervisor-From-Scratch

  Source code of a multiple series of tutorials about the hypervisor. Available at: https://rayanfam.com/tutorials

  Language:C2.2k308

• Hardware-Security/archer

  This repository contains the code for the archer paper, our microarchitecture analyzer.

  Language:C91