Pinned Repositories
kecc-public
KECC: KAIST Educational C Compiler. IMPORTANT: DON'T FORK!
shakeflow
ShakeFlow: Functional Hardware Description with Latency-Insensitive Interface Combinators (ASPLOS 2023)
antlr4rust
ANTLR4 parser generator runtime for Rust programming laguage
basejump_stl
BaseJump STL: A Standard Template Library for SystemVerilog
chisel-bootcamp
Generator Bootcamp Material: Learn Chisel the Right Way
corundum
Open source, high performance, FPGA-based NIC
cs420
KAIST CS420: Compiler Design (2020 Spring)
digraph
dynamatic
From C/C++ to Dynamically-Scheduled Circuits
firrtl
Flexible Intermediate Representation for RTL
minseongg's Repositories
minseongg/antlr4rust
ANTLR4 parser generator runtime for Rust programming laguage
minseongg/basejump_stl
BaseJump STL: A Standard Template Library for SystemVerilog
minseongg/chisel-bootcamp
Generator Bootcamp Material: Learn Chisel the Right Way
minseongg/corundum
Open source, high performance, FPGA-based NIC
minseongg/cs420
KAIST CS420: Compiler Design (2020 Spring)
minseongg/digraph
minseongg/dynamatic
From C/C++ to Dynamically-Scheduled Circuits
minseongg/firrtl
Flexible Intermediate Representation for RTL
minseongg/firrtl-to-verilog
FIRRTL to Verilog translator
minseongg/FPU
IEEE 754 floating point unit in Verilog
minseongg/infra-public
minseongg/kaist-cp.github.io
minseongg/linked-hash-map
A HashMap wrapper that holds key-value pairs in insertion order
minseongg/michaeljclark.github.io
RISC-V simulator for x86-64
minseongg/riscv-boom
SonicBOOM: The Berkeley Out-of-Order Machine
minseongg/riscv-elf-psabi-doc
A RISC-V ELF psABI Document
minseongg/rocket-chip
Rocket Chip Generator
minseongg/sv-parser
SystemVerilog parser library fully complient with IEEE 1800-2017
minseongg/tuple-utils
minseongg/cocotb-sandbox
minseongg/cs220
minseongg/fpga-network-stack
Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
minseongg/fpga_readings
Recipe for FPGA cooking
minseongg/gemmini
Berkeley's Spatial Array Generator
minseongg/gemmini-rocc-tests
Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
minseongg/riscv-boom-read
minseongg/riscv-env
minseongg/riscv-sodor
educational microarchitectures for risc-v isa
minseongg/shakeflow
ShakeFlow: Functional Hardware Description with Latency-Insensitive Interface Combinators (ASPLOS 2023)
minseongg/typenum
Compile time numbers in Rust.