Simple VHDL examples.
Just run make
or follow the steps:
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Analyze the source file(s):
ghdl –a --ieee=synopsys <design>.vhd
-
Analyze the testbench file(s):
ghdl –a --ieee=synopsys tb_<design>.vhd
-
Generate executable file:
ghdl –e --ieee=synopsys tb_<design>
-
Run the simulation:
ghdl –r --ieee=synopsys tb_<design> --vcd=tb_<design>.vcd
-
View the waveform:
gtkwave tb_<design>.vcd
Source: Link