Issues
- 0
A method of detecting when the slave finished serializing a bit on MISO should be added.
#13 opened by OmarAmer01 - 3
SPI_MODE/CPHA incorrectly implemented
#11 opened by zzattack - 0
Implicit latch for net r_SPI_MISO_Bit
#10 opened by zzattack - 0
Will the VHDL version be added?
#9 opened by dsb298 - 0
w_CPOL assigned a value but never read
#5 opened by HolyPriestFPGA - 1