nanluosu's Stars
x-Long/semiconductor-simulation-platform
半导体器件仿真模拟平台(现已支持PN结、BJT、MOS管),code于2019年。
sheldonucr/ucr-eecs168-lab
The lab schedules for EECS168 at UC Riverside
Daniel-GGB/My-Digital-IC-Library
我的数字IC厂库:Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
RIOSLaboratory/OpenRPDK28
Open source process design kit for 28nm open process
exp-3/CloudMusic.UWP-Repacked
网易云音乐UWP 去自动更新+故障修复版
Ncerzzk/MyBlog
Git简易博客
YosysHQ/yosys
Yosys Open SYnthesis Suite
labmlai/annotated_deep_learning_paper_implementations
🧑🏫 60+ Implementations/tutorials of deep learning papers with side-by-side notes 📝; including transformers (original, xl, switch, feedback, vit, ...), optimizers (adam, adabelief, sophia, ...), gans(cyclegan, stylegan2, ...), 🎮 reinforcement learning (ppo, dqn), capsnet, distillation, ... 🧠
zhongyang219/TrafficMonitor
这是一个用于显示当前网速、CPU及内存利用率的桌面悬浮窗软件,并支持任务栏显示,支持更换皮肤。
Vancir/365-days-get-xuanwulab-job
Get a job from Xuanwu Lab in 365 days
kevin861222/NYCU-ICLAB-2024-Spring
超詳細 ICLAB 2024 Spring 修課心得 & 修課指南,含資源整理
ociubotaru/transcripts
srush/GPU-Puzzles
Solve puzzles. Learn CUDA.
liguodongiot/llm-action
本项目旨在分享大模型相关技术原理以及实战经验(大模型工程化、大模型应用落地)
BUAA-CI-LAB/Literatures-on-SRAM-based-CIM
A reading list for SRAM-based Compute-In-Memory (CIM) research.
ZipCPU/dpll
A collection of phase locked loop (PLL) related projects
John1liu/YOLOV5-DeepSORT-Vehicle-Tracking-Master
In this project, urban traffic videos are collected from the middle section of Xi 'an South Second Ring Road with a large traffic flow, and interval frames are extracted from the videos to produce data sets for training and verification of YOLO V5 neural network. Combined with the detection results, the open-source vehicle depth model data set is used to train the vehicle depth feature weight file, and the deep-sort algorithm is used to complete the target tracking, which can realize real-time and relatively accurate multi-target recognition and tracking of moving vehicles.
mwrnd/innova2_8gb_adlt_xdma_ddr4_demo
Innova2 XCKU15P XDMA PCIe and DDR4 Demonstration Starter Project for the 8GB MNV303212A-ADLT
mwrnd/innova2_ddr4_troubleshooting
Innova-2 XCKU15P FPGA DDR4 Troubleshooting Bitstreams and Guide
mwrnd/innova2_xcku15p_ddr4_bram_gpio
XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA
FPGANinjas/nitefury_pcie_xdma_ddr
Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board
fpgasystems/Coyote
Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.
Dennisjiao/unbox_yolov5_deepsort_counting
Car Flow Counting
FPGA-Networking/Low-Cost-and-Programmable-CRC
Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
ForrestBlue/cortexm0ds
alinxalinx/AX7103
enjoy-digital/litescope
Small footprint and configurable embedded FPGA logic analyzer
hdl-util/hdmi
Send video/audio over HDMI on an FPGA
flytt-away/FPGA-Video-Capture
2023集创赛紫光同创杯一等奖项目
EttusResearch/uhd
The USRP™ Hardware Driver Repository